메뉴 건너뛰기




Volumn 24, Issue 19, 2012, Pages 2608-2613

Enhanced lithographic imaging layer meets semiconductor manufacturing specification a decade early

Author keywords

lithography; patterning; resists; semiconductors; sequential infiltration synthesis (SIS)

Indexed keywords

HARD MASKS; HIGH ASPECT RATIO; PATTERN COLLAPSE; PATTERNING; POLYMERIC RESIST; RESIST LAYERS; RESISTS; SCANNING ELECTRON MICROSCOPY IMAGE; SEMICONDUCTOR MANUFACTURING; SEQUENTIAL INFILTRATION SYNTHESIS (SIS);

EID: 84861019673     PISSN: 09359648     EISSN: 15214095     Source Type: Journal    
DOI: 10.1002/adma.201104871     Document Type: Article
Times cited : (71)

References (32)
  • 1
    • 84861090249 scopus 로고    scopus 로고
    • International Technology Roadmap for Semiconductors
    • International Technology Roadmap for Semiconductors,.
  • 12
    • 0033709951 scopus 로고    scopus 로고
    • (Eds: L. Merhari, L. T. Wille, K. E. Gonsalves, M. F. Gyure, S. Matsui, L. J. Whitman), Materials Research Society, Warrendale.
    • Y. Y. Luo, C. Stauffer, C. Ygartua, D. Chu, C. Hayzelden, in Materials Issues and Modeling for Device Nanofabrication, Vol. 584 (Eds:, L. Merhari, L. T. Wille, K. E. Gonsalves, M. F. Gyure, S. Matsui, L. J. Whitman,), Materials Research Society, Warrendale 2000, 183.
    • (2000) Materials Issues and Modeling for Device Nanofabrication , vol.584 , pp. 183
    • Luo, Y.Y.1    Stauffer, C.2    Ygartua, C.3    Chu, D.4    Hayzelden, C.5
  • 19


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.