A 41-phase switched-capacitor power converter with 3.8mV output ripple and 81% efficiency in baseline 90nm CMOS

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn 55, Issue , 2012, Pages 98-99

  Piqué, Gerard Villar ^a  

^a NXP SEMICONDUCTORS   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

90NM CMOS; CONVERSION RATIO; INPUT CURRENT; INPUT VOLTAGES; LOW OUTPUT VOLTAGE; OUTPUT VOLTAGE RIPPLE; POWER DENSITIES; SWITCHED-CAPACITOR POWER CONVERTERS;

CAPACITORS; POWER CONVERTERS;

EFFICIENCY;

EID: 84860666095     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2012.6176892     Document Type: Conference Paper

References (6)

1. G. Villar Piqué, H. J. Bergveld, "State-of-the-Art of Integrated Switching Power Converters," Analog Circuits Design, pp. 259-281, Springer, 2012.
2. L. Chang, R. K. Montoye, B. L. Ji, et al. "A Fully-Integrated Switched-Capacitor 2:1 Voltage Converter with Regulation Capability and 90% Efficiency at 2.3A/mm2," IEEE Symp. VLSI Circuits, pp. 55-56, June 2010.
3. 2 at 81% Efficiency," ISSCC Dig. Tech Papers, pp. 210-211, February 2010.
4. T. van Breussegem and M. Steyaert, "A Fully Integrated 74% Efficiency 3.6V to 1.5V 150mW Capacitive Point-of-Load DC/DC-Converter," Proc. ESSCIRC, pp. 434-437, September 2010.
5. D. Somasekhar, B. Srinivasan, G. Pandya, et. al, "Multi-Phase 1GHz Voltage Doubler Charge-Pump in 32nm Logic Process,", IEEE Symp. VLSI Circuits, pp. 196-197, June 2009.
6. M. D. Seeman and S. R. Sanders, "Analysis and Optimization of Switched- Capacitor DC-DC Converters," IEEE Transactions on Power Electronics, vol. 23,no. 2, pp. 841-851, February 2008.