Design steps towards a 40-kVA SiC inverter with an efficiency exceeding 99.5%

Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

Volumn , Issue , 2012, Pages 1536-1543

  Rabkowski, Jacek ^a   Peftitsis, Dimosthenis ^a   Nee, Hans Peter ^a  

^a ROYAL INSTITUTE OF TECHNOLOGY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CONDUCTION LOSS; DESIGN STEPS; EXPERIMENTAL INVESTIGATIONS; FREE CONVECTION COOLING; INPUT POWER; LOW LOSS; NORMALLY-ON; OUTPUT POWER; POWER-LOSSES; SILICON CARBIDE JUNCTION FIELD EFFECT TRANSISTORS; SWITCHING LOSS; THERMAL MEASUREMENTS;

EXHIBITIONS; POWER ELECTRONICS; SILICON CARBIDE;

EFFICIENCY;

EID: 84860184738     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APEC.2012.6166024     Document Type: Conference Paper

References (9)

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