Sparc T4: A dynamically threaded server-on-a-chip

IEEE Micro

Volumn 32, Issue 2, 2012, Pages 8-19

  Shah, Manish ^a   Golla, Robert ^b   Grohoski, Gregory ^c   Jordan, Paul ^d   Barreh, Jama ^e   Brooks, Jeffrey ^f   Greenberg, Mark ^g   Levinsky, Gideon ^h   Luttrell, Mark ^h   Olson, Christopher ⁱ   Samoail, Zeid ^j   Smittle, Matt ^k   Ziaja, Thomas ^b  

^a OKLAHOMA STATE UNIVERSITY   (United States)

^b UNIVERSITY OF TEXAS   (United States)

^c UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

^d RICE UNIVERSITY   (United States)

^e ILLINOIS INSTITUTE OF TECHNOLOGY   (United States)

^f UNIVERSITY OF MEMPHIS   (United States)

^g UNIVERSITY OF MANCHESTER   (United Kingdom)

^h STANFORD UNIVERSITY   (United States)

ⁱ UNIVERSITY OF WISCONSIN   (United States)

^j STONY BROOK UNIVERSITY   (United States)

^k SOUTHERN METHODIST UNIVERSITY   (United States)

more..

Author keywords

computer architecture; computer systems organization; microarchitecture implementation considerations; Microprocessors; multicore single chip multiprocessors; multithreaded processors; parallel architectures; pipeline processors; processor architectures; support for multithreaded execution; support for security

Indexed keywords

COMPUTER SYSTEMS ORGANIZATION; MICRO ARCHITECTURES; MULTI CORE; MULTITHREADED; MULTITHREADED PROCESSORS; PIPELINE PROCESSOR; PROCESSOR ARCHITECTURES;

COMPUTER SYSTEMS; MICROPROCESSOR CHIPS; NETWORK SECURITY; PARALLEL ARCHITECTURES;

COMPUTER ARCHITECTURE;

EID: 84859717032     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2012.1     Document Type: Article

References (5)

1. P. Kongetira et al., "Niagara: A 32-Way Multithreaded Sparc Processor," IEEE Micro, vol. 25, no. 2, 2005, pp. 21-29 (Pubitemid 40784326)
2. G. Grohoski, "Niagara-2: A Highly Threaded Server-on-a-Chip," 18th Hot Chips Symp., 2006, http://www.openSparc.net/pubs/preszo/06/04-Sun- Golla.pdf
3. M. Shah et al., "UltraSparc T2: A Highly- Threaded, Power-Efficient, Sparc SoC," Proc. IEEE Asian Solid-State Circuits Conf., IEEE CS Press, 2007, pp. 22-25
4. S. Patel et al., "Sun's Next-Generation Multithreaded Processor: Rainbow Falls," 21st Hot Chips Symp., 2009, http://www. openSparc.net/pubs/preszo/09/sunmicro-rainbowfalls-hotchips09.pdf
5. D. Jimenez and C. Lin, "Neural Methods for Dynamic Branch Prediction," ACM Trans. Computer Systems, vol. 20, no. 4, 2002, pp. 369-397 (Pubitemid 135702590)