Fast and compact error correcting scheme for reliable multilevel flash memories

Records of the IEEE International Workshop on Memory Technology, Design and Testing

Volumn 2002-January, Issue , 2002, Pages 27-31

  Rossi, D ^a   Metra, C ^a   Ricco B ^a  

^a UNIVERSITY OF BOLOGNA   (Italy)

Author keywords

Code standards; Degradation; Error correction; Error correction codes; Flash memory; Nonvolatile memory; Parity check codes; Random access memory; Redundancy; Timing

Indexed keywords

CODES (SYMBOLS); COST REDUCTION; DEGRADATION; ERROR CORRECTION; ERRORS; MATRIX ALGEBRA; MONOLITHIC MICROWAVE INTEGRATED CIRCUITS; RANDOM ACCESS STORAGE; REDUNDANCY;

ERROR CORRECTION CODES; NON-VOLATILE MEMORY; PARITY CHECK CODES; RANDOM ACCESS MEMORY; TIMING;

FLASH MEMORY;

EID: 84858881520     PISSN: 10874852     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/MTDT.2002.1029759     Document Type: Conference Paper

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