Boosting XML filtering with a scalable FPGA-based architecture

CIDR 2009 - 4th Biennal Conference on Innovative Data Systems Research

Volumn , Issue , 2009, Pages

  Mitra, Abhishek ^a   Vieira, Marcos R ^a   Bakalov, Petko ^a   Najjar, Walid ^a   Tsotras, Vassilis J ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION COST; CONTENT BASED ROUTING; EXPERIMENTAL EVALUATION; FILTER PROCESSING; FILTERING PROBLEMS; FPGA CHIPS; FPGA DEVICES; FPGA-BASED ARCHITECTURES; HARDWARE/SOFTWARE; HIGH THROUGHPUT; MULTI-CORE SYSTEMS; PARALLEL PROCESSING; PATH QUERIES; PROCESSING TIME; PUB/SUB; PUBLISH-SUBSCRIBE; REGULAR EXPRESSIONS; USER SUBSCRIPTION; XML FILTERING; XML QUERIES; XPATH QUERIES;

ELECTRONIC DATA INTERCHANGE; QUERY LANGUAGES;

XML;

EID: 84858633077     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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