Efficient performance evaluation of memory hierarchy for highly multithreaded graphics processors

Proceedings of the ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP

Volumn , Issue , 2012, Pages 23-33

  Baghsorkhi, Sara S ^a   Gelado, Isaac ^a   Delahaye, Matthieu ^a   Hwu, Wen Mei W ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

GPU; Memory hierarchy; Performance evaluation

Indexed keywords

APPLICATION EXECUTION; CLASSICAL PROBLEMS; CROSS VALIDATION; EXPERIMENTAL METHODOLOGY; GPU; GRAPHICS PROCESSING UNITS; GRAPHICS PROCESSOR; HARDWARE PERFORMANCE COUNTERS; HIGH RESOLUTION; MEMORY ACCESS; MEMORY HIERARCHY; MEMORY HIERARCHY PERFORMANCE; MEMORY OPERATIONS; MEMORY SYSTEMS; MICRO ARCHITECTURES; MONTE CARLO; MULTITHREADED; MULTITHREADED ARCHITECTURE; PERFORMANCE COUNTERS; PERFORMANCE EVALUATION; PERFORMANCE MEASURE; PERFORMANCE MONITORING; PROFILE DATA; PROGRAM BEHAVIOR; PROGRAM EXECUTION; PROGRAM SOURCE CODES; SAMPLED VALUES; SAMPLING RATES; SIMULATION TIME; SOFTWARE-BASED; SOURCE CODES; SPARSE MATRICES; STATE-OF-THE-ART PERFORMANCE; STATISTICAL APPROACH; STATISTICAL BOUNDS; TRACE COLLECTION; TRACE GENERATION;

COMPUTER ARCHITECTURE; COMPUTER GRAPHICS EQUIPMENT; COMPUTER SIMULATION; JAVA PROGRAMMING LANGUAGE; PARALLEL PROGRAMMING;

PROGRAM PROCESSORS;

EID: 84858379069     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/2145816.2145820     Document Type: Conference Paper

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