An integration of all refractory josephson logic lsi circuit

IEEE Transactions on Magnetics

Volumn 21, Issue 2, 1985, Pages 102-109

  Kosaka, S ^a   Shoji, A ^a   Aoyagi, M ^a   Shinoki, F ^a   Tahara, S ^a   Ohigashi, H ^a   Nakagawa, H ^a   Takada, S ^a   Hayakawa, H ^a  

^a ELECTROTECHNICAL LABORATORY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 84857813375     PISSN: 00189464     EISSN: 19410069     Source Type: Journal    
DOI: 10.1109/TMAG.1985.1063616     Document Type: Article

References (10)

1. H. Kroger, L.N. Smith, and D.W. Jillie “Selective niobium anodization process for fabricating Josephson tunnel junctions, “Appl.Phys.Lett., Vol. 39, pp. 280–282, August 1981.
2. M. Gurvitch, M.A. Washington, and H.A. Huggins, “High quality refractory Josephson tunnel junctions utilizing thin alminum layers,” Appl. Phys.Lett., Vol. 42, pp. 472–474, March 1983.
3. R.F. Broom, S.I. Raider, A. Oosenbrug, R.E. Drake, and W. Walter, “Niobium oxide-barrier tunnel junctions,” IEEE Trans. Electron Devices, Vol. ED-27, pp. 1998–2008, October 1980.
4. A. Shoji, S. Kosaka, F. Shinoki, M. Aoyagi, and H. Hayakawa, “All refractory Josephson tunnel junctions fabricated by reactive ion etching,” IEEE Trans. Magn., Vol. MAG-19 pp. 827–830, May 1983.
5. D. Jillie, L.N. Smith, H. Kroger, L.W. Currier, R.L. Payer, C. Potter, and D.M. Shaw, “All-refractory refractory Josephson logic circuits,” IEEE J. Solid-State Circuits, Vol. SC-18, pp. 173–180, April 1983.
6. S. Kosaka, A. Shoji, M. Aoyagi, F. Shinoki, H. Nakagawa, S. Takada, and H. Hayakawa, “High speed logic operations of all refractory Josephson integrated circuits,” Appl.Phys.Lett., Vol. 43, pp. 213–215, July 1983.
7. S.A. Reible, “Reactive ion etching in the fabrication of niobium tunnel junctions,” IEEE Trans. Magn., Vol. MAG-17 pp. 303–306, January 1981.
8. T.T. Foxe, B.D. Hunt, C. Rogers, A.W. Kleinsasser, and R.A. Buhrman, “Reactive ion etching of niobium,” J.Vac.Sci.Technol., Vol. 19, pp. 1394–1397, 1397, November 1981.
9. H. Nakagawa, H. Ohigashi, I. Kurosawa, E. Sogawa, S. Takada, and H. Hayakawa, “Josephson cell array circuit using four junction logic (4jL) gates,” Extended Abstract 15th Conf. Solid State Devices and Materials, Tokyo, pp. 137–140, 1983.
10. K. Suyama, H. Shimizu, S. Yokogawa, Y. Nakayama, and A. Shibatomi, Japanese J.Appl.Phys., Vol. Supplment 22–1, pp. 341–344, 1983.