A 12-bit 100-MS/s pipelined ADC in 45-nm CMOS

2011 International SoC Design Conference, ISOCC 2011

Volumn , Issue , 2011, Pages 405-407

  Nam, Jae Won ^a   Jeon, Young Deuk ^a   Yun, Seok Ju ^a   Roh, Tae Moon ^a   Kwon, Jong Kee ^a  

^a Electronics and Telecommunications Research Institute (ETRI)   (South Korea)

Author keywords

ADC; CMOS; Pipelined

Indexed keywords

CMOS INTEGRATED CIRCUITS; PIPELINES; SIGNAL TO NOISE RATIO;

DIFFERENTIAL NONLINEARITY; INTEGRAL NONLINEARITY; LOW-VOLTAGE CIRCUIT TECHNIQUES; PIPELINE ANALOG-TO-DIGITAL CONVERTERS; PIPELINED; SAMPLING FREQUENCIES; SIGNAL TO NOISE AND DISTORTION RATIO; SPURIOUS FREE DYNAMIC RANGE;

ANALOG TO DIGITAL CONVERSION;

EID: 84857428551     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/isocc.2011.6138617     Document Type: Conference Paper

References (10)

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