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Volumn , Issue , 2011, Pages 263-266

Application of the latency insertion method to electro-thermal circuit analysis

Author keywords

circuit simulation; electro thermal analysis; IR drop; latency insertion; power integrity

Indexed keywords

DESIGN STAGE; ELECTRO-THERMAL ANALYSIS; HIGH PERFORMANCE SYSTEMS; INTERCONNECT NETWORKS; IR DROP; LATENCY INSERTION; LATENCY INSERTION METHODS; OFF-CHIP; ON CHIPS; POWER INTEGRITY; SIMULATION TECHNIQUE; THERMAL PHENOMENA;

EID: 84855393103     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EPEPS.2011.6100242     Document Type: Conference Paper
Times cited : (3)

References (9)
  • 1
    • 0035087173 scopus 로고    scopus 로고
    • Latency insertion method (LIM) for the fast transient simulation of large networks
    • Jan.
    • José E. Schutt-Ainé, "Latency insertion method (LIM) for the fast transient simulation of large networks," IEEE Trans. Circuit Syst., vol. 48, Jan. 2001, pp. 81-89.
    • (2001) IEEE Trans. Circuit Syst. , vol.48 , pp. 81-89
    • Schutt-Ainé, J.E.1
  • 9
    • 84855363991 scopus 로고    scopus 로고
    • http://www.ansys.com/Products/Simulation+Technology/Fluid+Dynamics/ ANSYS+Icepak


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.