A two-dimensional low-diameter scalable on-chip network for interconnecting thousands of cores

IEEE Transactions on Parallel and Distributed Systems

Volumn 23, Issue 2, 2012, Pages 193-201

  Sibai, Fadi N ^a  

^a R and D Center   (Saudi Arabia)

Author keywords

hybrid networks; Many core processors; on chip interconnection networks

Indexed keywords

CORE SYSTEMS; HYBRID NETWORK; LOW-DIAMETER NETWORKS; MANY-CORE; NETWORK DIAMETER; NODE DEGREE; ON-CHIP INTERCONNECTION NETWORK; ON-CHIP NETWORKS; TORUS NETWORKS; VARIOUS CONFIGURATION;

ELECTRIC NETWORK TOPOLOGY; MESH NETWORKING;

INTERCONNECTION NETWORKS;

EID: 84855354919     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPDS.2011.160     Document Type: Article

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