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Volumn 1992-April, Issue , 1992, Pages 125-130

On fault deletion problem in concurrent fault simulation for synchronous sequential circuits

Author keywords

[No Author keywords available]

Indexed keywords

SEQUENTIAL CIRCUITS; TIMING CIRCUITS; VLSI CIRCUITS;

EID: 8444235855     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/VTEST.1992.232736     Document Type: Conference Paper
Times cited : (3)

References (12)
  • 1
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    • Test generation cost analysis and projections
    • P. Goel, "Test Generation Cost Analysis and Projections," Proc. of 17th Design Automation Conf., pp. 77-84, 1980.
    • (1980) Proc. of 17th Design Automation Conf. , pp. 77-84
    • Goel, P.1
  • 3
    • 84938012249 scopus 로고
    • On an improved diagnosis program
    • S. Seshu, "On an Improved Diagnosis Program," IEEE Trans. Elect. Comput., vol. EC-12, pp. 7679, 1965.
    • (1965) IEEE Trans. Elect. Comput. , vol.EC-12 , pp. 7679
    • Seshu, S.1
  • 4
    • 0016128614 scopus 로고
    • Comparison of parallel and deductive fault simulation methods
    • November
    • H. Y. Chang, S. G. Chappell, C. H. Elmendorf, and L. D. Schmidt, "Comparison of Parallel and Deductive Fault Simulation Methods," IEEE Trans, on Comput., vol. C-23, pp. 1132-1138, November 1974.
    • (1974) IEEE Trans, on Comput. , vol.C-23 , pp. 1132-1138
    • Chang, H.Y.1    Chappell, S.G.2    Elmendorf, C.H.3    Schmidt, L.D.4
  • 6
    • 84938738286 scopus 로고
    • A deductive method for simulating faults in logic circuits
    • D. B. Armstrong, "A Deductive Method for Simulating Faults in Logic Circuits," IEEE Trans. Comput., vol. C-21, pp. 464471, 1972.
    • (1972) IEEE Trans. Comput. , vol.C-21 , pp. 464471
    • Armstrong, D.B.1
  • 7
    • 85050924325 scopus 로고
    • The concurrent simulation of nearly identical digital networks
    • E. G. Ulrich and T. Baker,' 'The Concurrent Simulation of Nearly Identical Digital Networks," Proc. of 10th Design Automation Workshop, vol. 6, pp. 145-150, 1973.
    • (1973) Proc. of 10th Design Automation Workshop , vol.6 , pp. 145-150
    • Ulrich, E.G.1    Baker, T.2
  • 8
    • 0026202785 scopus 로고
    • The fault dropping problem in concurrent event-driven simulation
    • August
    • S. Gai and P. L. Montessoro, "The Fault Dropping Problem in Concurrent Event-Driven Simulation," IEEE Trans. Computer-Aided Design, vol. 10, pp. 968-971, August, 1991.
    • (1991) IEEE Trans. Computer-Aided Design , vol.10 , pp. 968-971
    • Gai, S.1    Montessoro, P.L.2
  • 10
    • 38749131846 scopus 로고
    • Diagnostic oriented test pattern generation
    • Glasgow, U.K., March
    • P. Camurati, A. Lioy, P. Prinetto, and M. S. Reorda, "Diagnostic Oriented Test Pattern Generation," in Proc. EDAC-90, Glasgow, U.K., pp. 470-474, March, 1990.
    • (1990) Proc. EDAC-90 , pp. 470-474
    • Camurati, P.1    Lioy, A.2    Prinetto, P.3    Reorda, M.S.4
  • 11
    • 0002609165 scopus 로고
    • A neutral netlist of 10 combinational benchmark circuits and a target translation in FORTRAN
    • Special Session on ATPG and Fault Simulation
    • F. Brglez and H. Fujiwara, "A Neutral Netlist of 10 Combinational Benchmark Circuits and a Target Translation in FORTRAN," Proc. Intl. Symp. on Circuits and Systems, pp. 705-712, 1985, Special Session on ATPG and Fault Simulation.
    • (1985) Proc. Intl. Symp. on Circuits and Systems , pp. 705-712
    • Brglez, F.1    Fujiwara, H.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.