Reducing shared cache contention by scheduling order adjustment on commodity multi-cores

IEEE International Symposium on Parallel and Distributed Processing Workshops and Phd Forum

Volumn , Issue , 2011, Pages 984-992

  Wang, Yingxin ^a   Cui, Yan ^a   Tao, Pin ^a   Fan, Haining ^a   Chen, Yu ^a   Shi, Yuanchun ^a  

^a TSINGHUA UNIVERSITY   (China)

Author keywords

Co scheduling; Multi core; Performance counters; Shared cache contention

Indexed keywords

CACHE MISS; CACHE SIZE; CO-SCHEDULING; COMMODITY OPERATING SYSTEMS; DYNAMIC SCHEDULING; EXECUTION TIME; KEY FEATURE; MULTI CORE; MULTI-CORE PROCESSOR; MULTI-CORE SYSTEMS; MULTI-CORES; OFFLINE; PERFORMANCE COUNTERS; PERFORMANCE IMPROVEMENTS; SHARED CACHE; SINGLE-CORE PROCESSORS; STATIC SCHEDULING; TIME SLICE;

COBALT COMPOUNDS; DISTRIBUTED PARAMETER NETWORKS; MICROPROCESSOR CHIPS; PARALLEL PROCESSING SYSTEMS;

SCHEDULING;

EID: 83455173330     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPDPS.2011.248     Document Type: Conference Paper

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