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Volumn 14, Issue 3, 1997, Pages 104-112

Microprocessor architecture design with ATLAS

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; PROBLEM SOLVING;

EID: 8344288227     PISSN: 07407475     EISSN: None     Source Type: Journal    
DOI: 10.1109/54.606008     Document Type: Article
Times cited : (2)

References (9)
  • 1
    • 0024754764 scopus 로고
    • A Benchmark Tutorial
    • Oct.
    • W.J. Price, "A Benchmark Tutorial," IEEE Micro, Vol. 9, No. 5, Oct. 1989, pp. 28-43.
    • (1989) IEEE Micro , vol.9 , Issue.5 , pp. 28-43
    • Price, W.J.1
  • 2
    • 0025568269 scopus 로고
    • An Overview of Common Benchmarks
    • Dec.
    • R.P. Weicker, "An Overview of Common Benchmarks," Computer, Vol. 23, No. 12, Dec. 1990, pp. 65-75.
    • (1990) Computer , vol.23 , Issue.12 , pp. 65-75
    • Weicker, R.P.1
  • 3
    • 8344277775 scopus 로고
    • ATLAS - Advanced Tools and Languages for Microprocessor Architecture Simulation
    • Sept.
    • D. Basch and M. Zagar, "ATLAS - Advanced Tools and Languages for Microprocessor Architecture Simulation," J. Computing and Information Technology, Vol. 1, No. 3, Sept. 1993, pp. 183-197.
    • (1993) J. Computing and Information Technology , vol.1 , Issue.3 , pp. 183-197
    • Basch, D.1    Zagar, M.2
  • 4
    • 0018915337 scopus 로고
    • Chip-Level Simulation of Microprocessors
    • Jan.
    • J.R. Armstrong and G.W. Woodruf, "Chip-Level Simulation of Microprocessors," Computer, Vol. 13, No. 1, Jan. 1980, pp. 94-100.
    • (1980) Computer , vol.13 , Issue.1 , pp. 94-100
    • Armstrong, J.R.1    Woodruf, G.W.2
  • 5
    • 0023960674 scopus 로고
    • Chip-Level Modeling with HDLs
    • Feb.
    • J.R. Armstrong, "Chip-Level Modeling with HDLs," IEEE Design & Test of Computers, Vol. 5, No. 1, Feb. 1988, pp. 8-18.
    • (1988) IEEE Design & Test of Computers , vol.5 , Issue.1 , pp. 8-18
    • Armstrong, J.R.1
  • 6
    • 8344267341 scopus 로고
    • Circlegen - A VLSI Circle Generator
    • UCSB-ECE, Univ. of California, Santa Barbara
    • D. Probert, M. Zagar, and J. Clement, &Circlegen - A VLSI Circle Generator,& VLSI Design Project Report 224, UCSB-ECE, Univ. of California, Santa Barbara, 1984.
    • (1984) VLSI Design Project Report 224
    • Probert, D.1    Zagar, M.2    Clement, J.3
  • 7
    • 8344228273 scopus 로고
    • A VLSI Circle Generator Arithmetic-Logic Unit
    • UCSB-ECE, Univ. of California, Santa Barbara
    • M. Zagar, &A VLSI Circle Generator Arithmetic-Logic Unit,& VLSI Design Project Report 224, UCSB-ECE, Univ. of California, Santa Barbara, 1984.
    • (1984) VLSI Design Project Report 224
    • Zagar, M.1
  • 9
    • 0019437453 scopus 로고
    • Instruction Set Processor Specifications (ISPS): The Notation and Its Applications
    • Jan.
    • M.R. Barbacci, &Instruction Set Processor Specifications (ISPS): The Notation and Its Applications,& IEEE Trans. Computers, Vol. C-30, No. 1, Jan. 1981, pp. 2440.
    • (1981) IEEE Trans. Computers , vol.C-30 , Issue.1 , pp. 2440
    • Barbacci, M.R.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.