-
1
-
-
0038155585
-
An integrated 200-W class-D audio amplifer
-
July
-
M. Berkhout, "An integrated 200-W Class-D audio amplifer," IEEE J. Solid-State Circuits, vol. 38, pp. 1198-1206, July 2003.
-
(2003)
IEEE J. Solid-state Circuits
, vol.38
, pp. 1198-1206
-
-
Berkhout, M.1
-
2
-
-
8344240334
-
Low-to-high voltage CMOS output interfaces integrated in a standard low voltage CMOS technology
-
Feb. TP 10.6
-
M. Declercq, M. Schubert, and F. Clement, "Low-to-high voltage CMOS output interfaces integrated in a standard low voltage CMOS technology," in Proc. IEEE CICC, Feb. 1993, TP 10.6.
-
(1993)
Proc. IEEE CICC
-
-
Declercq, M.1
Schubert, M.2
Clement, F.3
-
3
-
-
0027929423
-
Design and optimization of high voltage analog and digital circuits built in a standard 5 V CMOS technology
-
May, 25.6
-
H. Ballan, M. Declercq, and E. Krummenacher, "Design and optimization of high voltage analog and digital circuits built in a standard 5 V CMOS technology," in Proc. IEEE CICC, May 1994, 25.6, pp. 574-577.
-
(1994)
Proc. IEEE CICC
, pp. 574-577
-
-
Ballan, H.1
Declercq, M.2
Krummenacher, E.3
-
4
-
-
0029217505
-
12 V ∑-Δ class-D amplifier in 5 V CMOS technology
-
H. Ballan, M. Declercq, and J. U. Duncombe, "12 V ∑-Δ Class-D amplifier in 5 V CMOS technology," in Proc. IEEE CICC, 1995, pp. 559-562.
-
(1995)
Proc. IEEE CICC
, pp. 559-562
-
-
Ballan, H.1
Declercq, M.2
Duncombe, J.U.3
-
5
-
-
0032639954
-
Analytical technique for calculating the output harmonics of an H-bridge inverter with dead time
-
May
-
C. M. Wu, W. H. Lau, and H. S. H. Chung, "Analytical technique for calculating the output harmonics of an H-bridge inverter with dead time," IEEE Trans. Circuits Syst. I: Fund. Theory Applicat., vol. 46, pp. 617-627, May 1999.
-
(1999)
IEEE Trans. Circuits Syst. I: Fund. Theory Applicat.
, vol.46
, pp. 617-627
-
-
Wu, C.M.1
Lau, W.H.2
Chung, H.S.H.3
-
6
-
-
0032657780
-
Effect of dead time on harmonic distortion in class-D audio power amplifiers
-
June
-
I. D. Mosely, P. H. Mellor, and C. M. Bingham, "Effect of dead time on harmonic distortion in class-D audio power amplifiers," Electron. Lett., vol. 35, no. 12, pp. 950-952, June 1999.
-
(1999)
Electron. Lett.
, vol.35
, Issue.12
, pp. 950-952
-
-
Mosely, I.D.1
Mellor, P.H.2
Bingham, C.M.3
-
7
-
-
0033697528
-
An investigation on the parameters affecting total harmonic distortion in class D amplifiers
-
May
-
M. T. Tan, H. C. Chau, B. H. Gwee, and J. S. Chang, "An investigation on the parameters affecting total harmonic distortion in class D amplifiers," in Proc. IEEE ISCAS, vol. 4, May 2000, pp. 193-196.
-
(2000)
Proc. IEEE ISCAS
, vol.4
, pp. 193-196
-
-
Tan, M.T.1
Chau, H.C.2
Gwee, B.H.3
Chang, J.S.4
-
8
-
-
0038645509
-
A Class D output stage with zero dead time
-
7.5
-
M. Berkhout, "A Class D output stage with zero dead time," in IEEE ISSCC Dig. Tech. Papers, vol. 1, 2003, 7.5, pp. 134-135.
-
(2003)
IEEE ISSCC Dig. Tech. Papers
, vol.1
, pp. 134-135
-
-
Berkhout, M.1
-
9
-
-
0020844801
-
Design parameters important for the optimization of very-high-fidelity PWM (Class D) audio amplifiers
-
Nov.
-
B. E. Attwood, "Design parameters important for the optimization of very-high-fidelity PWM (Class D) audio amplifiers," J. Audio Engineers Soc., vol. 31, no. 11, pp. 842-853, Nov. 1983.
-
(1983)
J. Audio Engineers Soc.
, vol.31
, Issue.11
, pp. 842-853
-
-
Attwood, B.E.1
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