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Volumn 12, Issue 9, 1997, Pages 14-X2
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Board level image processing - When DSPs and FPGAs Meet: Optimizing image processing architectures
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NONE
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER ARCHITECTURE;
COST EFFECTIVENESS;
DIGITAL SIGNAL PROCESSING;
IMAGE COMMUNICATION SYSTEMS;
IMAGE ENHANCEMENT;
IMAGE QUALITY;
LOGIC GATES;
PARALLEL PROCESSING SYSTEMS;
PIPELINE PROCESSING SYSTEMS;
PRINTED CIRCUIT BOARDS;
REAL TIME SYSTEMS;
FIELD PROGRAMMABLE GATE ARRAYS (FPGA);
FLUOROSCOPY;
IMAGE PROCESSING;
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EID: 8344221994
PISSN: 10420711
EISSN: None
Source Type: Trade Journal
DOI: None Document Type: Article |
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Times cited : (1)
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References (0)
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