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Volumn , Issue , 2006, Pages

Grid connected photovoltaic (PV) inverter with robust phase-locked loop (PLL)

Author keywords

Field programmable gate array; integer arithmetic; inverter multi variable filter; phase locked loop; photovoltaic power system; voltage oriented control.

Indexed keywords

AC CURRENTS; COMMON PROPERTY; CONTROL CIRCUITS; CONTROL STRUCTURE; GRID-CONNECTED; INTEGER ARITHMETIC; INVERTER MULTI-VARIABLE FILTER; INVERTER OPERATIONS; LOOK UP TABLE; MAXIMUM POWER POINT TRACKING; PARK TRANSFORM; PHOTOVOLTAIC POWER SYSTEMS; SOLAR PANELS; STEP UP TRANSFORMERS; VOLTAGE HARMONICS; VOLTAGE ORIENTED CONTROL.; VOLTAGE-SOURCE INVERTER;

EID: 82955239996     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/TDCLA.2006.311434     Document Type: Conference Paper
Times cited : (19)

References (7)
  • 2
    • 33745131090 scopus 로고    scopus 로고
    • A new robust experimentally validated phase locked loop for power electronic control
    • Aug.
    • M. C. Benhabib, S. Saadate, "A New Robust Experimentally Validated Phase Locked Loop for Power Electronic Control," EPE Journal, vol. 15, pp. 36-47, Aug. 2005.
    • (2005) EPE Journal , vol.15 , pp. 36-47
    • Benhabib, M.C.1    Saadate, S.2
  • 3
    • 70349318887 scopus 로고    scopus 로고
    • FPGA PLL for high power factor and low harmonics content active rectifier
    • Riga, Sept
    • H. Holmberg, T. Ostrem, W. sulkowski, "FPGA PLL for High Power Factor and Low Harmonics Content Active Rectifier," EPE-PEMC, Riga, Sept. 2004.
    • (2004) EPE-PEMC
    • Holmberg, H.1    Ostrem, T.2    Sulkowski, W.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.