On limitations of traditional multi-core and potential of many-core processing architectures for sparse linear solvers used in large-scale power system applications

IEEE Power and Energy Society General Meeting

Volumn , Issue , 2011, Pages

  Li, Zhao ^a   Donde, Vaibhav D ^a   Tournier, Jean Charles ^a   Yang, Fang ^a  

^a ABB INC   (United States)

Author keywords

Compute Unified Device Architecture (CUDA); Conjugate Gradient (CG); Conjugate Gradient Normal Residual (CGNR); Graphics Processing Unit (GPU); High Performance Computing (HPC); multi core CPU; Open Computing Language (OpenCL); power flow; power system state estimation

Indexed keywords

COMPUTE UNIFIED DEVICE ARCHITECTURES; CONJUGATE GRADIENT; GRAPHICS PROCESSING UNIT; HIGH-PERFORMANCE COMPUTING; MULTI CORE; OPEN COMPUTING LANGUAGE (OPENCL); POWER FLOWS; POWER SYSTEM STATE ESTIMATION;

COMPUTER GRAPHICS EQUIPMENT; COMPUTER SOFTWARE SELECTION AND EVALUATION; CONJUGATE GRADIENT METHOD; DC POWER TRANSMISSION; ELECTRIC UTILITIES; ESTIMATION; LINEAR EQUATIONS; MEMORY ARCHITECTURE; NETWORK ARCHITECTURE; POWER TRANSMISSION; PROGRAM PROCESSORS; STATE ESTIMATION;

ITERATIVE METHODS;

EID: 82855168156     PISSN: 19449925     EISSN: 19449933     Source Type: Conference Proceeding    
DOI: 10.1109/PES.2011.6039675     Document Type: Conference Paper

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