Compact, infinite input resistance, wide receiving range, high-to-low voltage receiver circuits based on novel one-DMOS-FET linear level-shifting

IEEE - 2011 Semiconductor Conference Dresden: Technology, Design, Packaging, Simulation and Test, SCD 2011 - International Conference, Workshop and Table-Top Exhibition

Volumn , Issue , 2011, Pages

  Zhang, Yipin ^a   Burghartz, Joachim N ^a  

^a Institut fur Mikroelektronik Stuttgart   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG SIGNALS; CIRCUIT ARRANGEMENT; DIGITAL RECEIVERS; EXPERIMENTAL MEASUREMENTS; EXTENSIVE SIMULATIONS; HIGH-TO-LOW; HIGH-VOLTAGES; INPUT RESISTANCE; LEVEL-SHIFTING; LOW-VOLTAGE; OUTPUT SWING; RECEIVER CIRCUITS; TWO-RESISTORS;

CHIP SCALE PACKAGES; INDUSTRIAL APPLICATIONS;

SIGNAL RECEIVERS;

EID: 82155192405     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SCD.2011.6068709     Document Type: Conference Paper

References (7)

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3. M. Khorasani, et al., "Low-Power Static and Dynamic High-Voltage CMOS Level-Shifter Circuits," IEEE International Symposium on Circuits and Systems, 2008.
4. W-K. Park, C-U. Cha, S-C. Lee, "A Novel Level Shifter Circuit Design for Display Panel Driver," 49th IEEE International Midwest Symposium on Circuits and Systems, 2006.
5. D. Pan, H.W. Li, B.M. Wilamowski, "A Low Voltage to High Voltage Level Shifter Circuit for MEMS Application," University/Government/ Industry Microelectronics Symposium, 2003.
6. M.J. Declercq, M. Schubert, F. Clement, "5V-to-75V CMOS Output Interface Circuits" ISSCC 93/SESSION 10/ HIGH-SPEED COMMUNICATION AND INTERFACES/PAPER TP10.6.
7. IO-Link Interface and System Specification, Version 1.1, pp. 38-40 published November 2010.