The neighboring pixel representation for efficient binary image processing operations

PARELEC 2006 - Proceedings: International Symposium on Parallel Computing in Electrical Engineering

Volumn , Issue , 2006, Pages 396-401

  Kapela, Rafał ^a   Rybarczyk, Andrzej ^a  

^a POZNAN UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTATIONAL TIME; CONTOUR TRACKING; CONTOUR-SHAPE DESCRIPTOR; HARDWARE DEVICES; HARDWARE REALIZATION; MEMORY ACCESS; MEMORY CELL; MORPHOLOGICAL OPERATIONS; PIXEL REPRESENTATION; PROCESSING OPERATIONS; WORKING TIME; ZERO VALUES;

ALGORITHMS; BINARY IMAGES; CONTOUR MEASUREMENT; ELECTRICAL ENGINEERING; IMAGE SEGMENTATION; MATHEMATICAL MORPHOLOGY; MOTION PICTURE EXPERTS GROUP STANDARDS; PARALLEL ARCHITECTURES;

PIXELS;

EID: 81455148223     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PARELEC.2006.80     Document Type: Conference Paper

References (6)

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3. Ebrahimi T., Abdeljaoued Y., Figureas R.M., Divorra Escoda O., "MPEG-7 Camera", In Proc. International Conference on Image Processing, Thessaloniki, Oct. 2001, Vol.3, pp. 600-603. (Pubitemid 33058058)
4. "RC1000 Hardware Reference Manual. Version 2.3", Celoxica Limited, 2001.
5. R. C. Gonzalez, R. E. Woods, "Digital Image Processing", Prentice-Hall, Inc. Upper Saddle River, New Jersey 07458.
6. Savakis A., Śniatała P., Rudnicki R., Real Time Video Annotation Using MPEG-7 Motion Activity Descriptors. In: Proc. Mixed Design of Integrated Circuits and Systems, MIXDES'2003, Łodz Poland, Vol.1, pp. 625-628.