STM with transparent API considered harmful

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 7016 LNCS, Issue PART 1, 2011, Pages 326-337

  Carvalho, Fernando Miguel ^a,b   Cachopo, Joao ^b  

^a INSTITUTO SUPERIOR DE ENGENHARIA DE LISBOA   (Portugal)

^b INESC ID   (Portugal)

Author keywords

Benchmark; Performance; Transactional Memory

Indexed keywords

BENCHMARK; CONCURRENT PROGRAM; PERFORMANCE; SOFTWARE TRANSACTIONAL MEMORY; TRANSACTIONAL MEMORY;

ALGORITHMS; MEMORY ARCHITECTURE; STORAGE ALLOCATION (COMPUTER);

PARALLEL PROCESSING SYSTEMS;

EID: 80455144642     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-24650-0_28     Document Type: Conference Paper

References (18)

1. Afek, Y., Korland, G., Zilberstein, A.: Lowering STM overhead with static analysis. In: Cooper, K., Mellor-Crummey, J., Sarkar, V. (eds.) LCPC 2010. LNCS, vol. 6548, pp. 31-45. Springer, Heidelberg (2011)
2. Ansari, M., Kotselidis, C., Jarvis, K., Luján, M., Kirkham, C., Watson, I.: Lee-TM: A non-trivial benchmark suite for transactional memory. In: Bourgeois, A.G., Zheng, S.Q. (eds.) ICA3PP 2008. LNCS, vol. 5022, pp. 196-207. Springer, Heidelberg (2008)
3. Beckman, N.E., Kim, Y.P., Stork, S., Aldrich, J.: Reducing stm overhead with access permissions. In: IWACO, pp. 2:1-2:10. ACM, New York (2009)
4. Cachopo, J., Rito-Silva, A.: Versioned boxes as the basis for memory transactions. Sci. Comput. Program. 63, 172-185 (2006)
5. Minh, C.C., Chung, J., Kozyrakis, C., Olukotun, K.: STAMP: Stanford transactional applications for multi-processing. In: IISWC 2008 (September 2008)
6. Carvalho, F.M. (2011), https://github.com/inesc-id-esw/JWormBench
7. Cascaval, C., Blundell, C., Michael, M.M., Cain, H.W., Chiras, S., Wu, P., Chatterjee, S.: Software transactional memory: why is it only a research toy? Commun. ACM 51(11), 40-46 (2008)
8. Dice, D., Shalev, O., Shavit, N.: Transactional locking II. In: Dolev, S. (ed.) DISC 2006. LNCS, vol. 4167, pp. 194-208. Springer, Heidelberg (2006)
9. Dragojevic, A., Ni, Y., Adl-Tabatabai, A.-R.: Optimizing transactions for captured memory. In: SPAA 2009, pp. 214-222. ACM, New York (2009)
10. Fernandes, S.M., Cachopo, J.: Lock-free and scalable multi-version software transactional memory. In: PPoPP 2011, pp. 179-188. ACM, New York (2011)
11. Gamma, E., Helm, R., Johnson, R., Vlissides, J.: Design patterns: Elements of reusable object-oriented software. Addison-Wesley, Reading (1995)
12. Guerraoui, R., Kapalka, M., Vitek, J.: Stmbench7: a benchmark for software transactional memory. SIGOPS Oper. Syst. Rev. 41, 315-324 (2007)
13. Harmanci, D., Felber, P., Gramoli, V., Fetzer, C.: Tmunit: Testing transactional memories. In: TRANSACT (2009)
14. Herlihy, M., Luchangco, V., Moir, M.: A flexible framework for implementing software transactional memory. SIGPLAN Not. 41, 253-262 (2006)
15. Korland, G., Shavit, N., Felber, P.: Noninvasive concurrency with java stm. In: MultiProg 2010 (2010)
16. Riegel, T., Felber, P., Fetzer, C.: A lazy snapshot algorithm with eager validation, pp. 284-298 (2006)
17. Yoo, R.M., Ni, Y., Welc, A., Saha, B., Adl-Tabatabai, A.-R., Lee, H.-H.S.: Kicking the tires of software transactional memory: why the going gets tough. In: SPAA 2008, pp. 265-274. ACM, New York (2008)
18. Zyulkyarov, F., Cristal, A., Cvijic, S., Ayguade, E., Valero, M., Unsal, O., Harris, T.: Wormbench: a configurable workload for evaluating transactional memory systems. In: MEDEA 2008, pp. 61-68. ACM, New York (2008)