A CMOS analog vector quantizer for pattern recognition

AP-ASIC 1999 - 1st IEEE Asia Pacific Conference on ASICs

Volumn , Issue , 1999, Pages 112-115

  Hung, Yu Cherng ^a   Liu, Bin Da ^a  

^a NATIONAL CHENG KUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

EID: 80155141422     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/APASIC.1999.824041     Document Type: Conference Paper

References (8)

1. A. Gersho and R. M. Gray, Vector Quantization and Siginal Compression, No'rwell, MA: Kluwer, 1992.
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3. G. Turtle, S. Fallahi and A. Abidi, "An 8b CMOS vector A/D converter, " ISSCC Dig. Tech. Papers, 1993, pp. 38-39.
4. B. Hochet, V. Peiris, S. Abdot, M. J. Declercq, "Implementation of a learning Kohonen neuron based on a new multilevel storage technique, " IEEE J. Solid-State Circuits, vol. 26, no. 3, pp. 262-267, Mar. 1991.
5. W. C. Fang, B. J. Sheu, O. T. C. Chen, J. Choi, "A VLSI neural processor for image data compression using self-organization networks, " IEEE Trans. Neural Networks, vol. 3, no. 3, pp. 506-517, May 1992.
6. Y. He and U. Cilingiroglu, "A charge-based on-chip adaptation Kohonen neural network, " IEEE Trans. Neural Networks, vol. 4, no. 3, pp. 462-469, May 1993.
7. G. Cauwenberghs and V. Pedroni, "A Low-Power CMOS Analog Vector Quantizer, " IEEE J. Solid-State Circuits, vol. 32, no. 8, pp. 1278-1283, Aug. 1997.
8. Y.-C. Hung and B.-D. Liu, "A generalized high-precision analog CMOS rank finder for Max/Min/Med application, " will be presented at the 8th IEEE International Conference on Fuzzy Systems, (August 22-25, 1999, Seoul, Korea)