Catapult synthesis: A practical introduction to interactive C synthesis

High-Level Synthesis: From Algorithm to Digital Circuit

Volumn , Issue , 2008, Pages 29-52

  Bollaert, Thomas ^a  

^a MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

Algorithmic synthesis; Allocation; ANSI C; ANSI C++; ASIC; Behavioral synthesis; Catapult Synthesis; DCT; Design; Design space exploration; ESL; FPGA; Gantt chart; Hierarchy; High level synthesis; Interface synthesis; IP; JPEG; Loop merging; Loop pipelining; Loop unrolling; Mentor Graphics; Micro architecture; Parallelism; Reuse; RTL; Scheduling; SoC; SystemC; TLM; Verification; Verilog; VHDL

Indexed keywords

EID: 80054882920     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1007/978-1-4020-8588-8_3     Document Type: Chapter

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