Modelling, verification and synthesis of two-tier hierarchical fixed-priority preemptive scheduling

Proceedings - Euromicro Conference on Real-Time Systems

Volumn , Issue , 2011, Pages 172-181

  Åsberg, Mikael ^a   Pettersson, Paul ^a   Nolte, Thomas ^a  

^a MÄLARDALEN UNIVERSITY   (Sweden)

Author keywords

code synthesis; formal verification; hierarchical scheduling; modelling; real time systems

Indexed keywords

CODE-SYNTHESIS; FORMAL VERIFICATIONS; HARD REAL-TIME; HIERARCHICAL SCHEDULING; MEMORY CONSUMPTION; MEMORY OVERHEADS; MODELLING; PRE-EMPTIVE SCHEDULING; RUNTIMES; SCHEDULING PARAMETERS; SCHEDULING POLICIES; TIME DOMAIN; TIMING ERRORS;

HIERARCHICAL SYSTEMS; MODEL CHECKING; SCHEDULING;

REAL TIME SYSTEMS;

EID: 80052990420     PISSN: 10683070     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECRTS.2011.24     Document Type: Conference Paper

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