Exploiting concurrent kernel execution on graphic processing units

Proceedings of the 2011 International Conference on High Performance Computing and Simulation, HPCS 2011

Volumn , Issue , 2011, Pages 24-32

  Wang, Lingyuan ^a   Huang, Miaoqing ^b   El Ghazawi, Tarek ^a  

^a GEORGE WASHINGTON UNIVERSITY   (United States)

^b UNIVERSITY OF ARKANSAS   (United States)

Author keywords

Concurrent kernel execution; GPU computing; Multi threaded programming

Indexed keywords

APPLICATION LEVEL; APPLICATION PERFORMANCE; CO-PROCESSORS; COMPUTING RESOURCE; CONCURRENT KERNEL EXECUTION; CONTEXT SWITCHING; GPU COMPUTING; GRAPHIC PROCESSING UNITS; GRAPHICS PROCESSING UNITS; HIGH-PERFORMANCE COMPUTING; MICRO-BENCHMARK; MULTI-CORE PLATFORMS; MULTI-THREADED APPLICATION; MULTITHREADED; PARALLEL APPLICATION; RUNTIMES; SAR SENSORS;

COMPUTER GRAPHICS EQUIPMENT; COMPUTER SOFTWARE SELECTION AND EVALUATION; PROGRAM PROCESSORS; SYNTHETIC APERTURE RADAR;

BENCHMARKING;

EID: 80052985746     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/HPCSim.2011.5999803     Document Type: Conference Paper

References (10)

1. P. Jetley, L. Wesolowski, F. Gioachin, L. V. Kalé, and T. R. Quinn, "Scaling hierarchical N-body simulations on GPU clusters," in Proc. the 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis (SC'10), Nov. 2010, pp. 1-11.
2. S. S. Hampton, S. R. Alam, P. S. Crozier, and P. K. Agarwal, "Optimal utilization of heterogeneous resources for biomolecular simulations," in Proc. the 2010 ACM/IEEE International Conference for High Performance Computing, Networking, Storage and Analysis (SC'10), Nov. 2010, pp. 1-11.
3. NVIDIA Corporation, "NVIDIA's next generation CUDA compute architecture: Fermi," White paper V1.1, Jun. 2009, available online on http://www.nvidia.com.
4. NVIDIA CUDA Programming Guide 4.0, NVIDIA Corporation, Mar. 2011.
5. Khronos OpenCL Working Group, OpenCL 1.1 Specification, Khronos Group, Sep. 2010.
6. The Portland Group, http://www.pgroup.com/.
7. L. Wang, M. Huang, V. K. Narayana, and T. El-Ghazawi, "Scaling scientific applications on clusters of hybrid multicore/GPU nodes," in Proc. The 8th ACM International Conference on Computing Frontiers (CF'11), May 2011.
8. GCC Unified Parallel C (GCC UPC). http://www.gccupc.org.
9. D. A. Bader, K. Madduri, J. R. Gilbert, V. Shah, J. Kepner, T. Meuse, and A. Krishnamurthy, "Designing scalable synthetic compact applications for benchmarking high productivity computing systems," CTWatch Quarterly, vol. 2, no. 4B, pp. 41-51, Nov. 2006.
10. NVIDIA's next generation CUDA computer architecture: Fermi, NVIDIA, 2009.