10 Gbps, 530 fJ/b optical transceiver circuits in 40 nm CMOS

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2011, Pages 290-291

  Liu, Frankie ^a   Patil, Dinesh ^c   Lexau, Jon ^a   Amberg, Philip ^a   Dayringer, Michael ^a   Gainsley, Jon ^a   Moghadam, Hesam Fathi ^a   Zheng, Xuezhe ^a   Cunningham, John E ^a   Krishnamoorthy, Ashok V ^a   Alon, Elad ^b   Ho, Ron ^a  

^a ORACLE CORPORATION   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

^c Rambus   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

10 GBPS; HIGH ENERGY EFFICIENCY; OPTICAL TRANSCEIVERS; RECEIVER CIRCUITS; SILICON PHOTONICS;

ENERGY EFFICIENCY; LIGHT MODULATORS;

VLSI CIRCUITS;

EID: 80052682971     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Krishnamoorthy et al., "Computer systems based on silicon photonic interconnect," Proc. IEEE 97:7, pp. 1337-61, July '09.
2. Zheng et al., "Ultra-efficient 10Gb/s hybrid integrated silicon photonic transmitter and receiver," Optics Express, submitted.
3. Woodward et al., "Modulator-driver circuits for optoelectronic VLSI," IEEE Photonics Tech. Letters 9:6, pp. 839-41, June '97.
4. Palermo et al., "High-speed transmitters in 90nm CMOS for high-density optics," ESSCIRC, pp. 508-11, Sept. '06.
5. Ingels et al., "A 1-Gb/s, 0.7-μm CMOS optical receiver w/ full rail-to-rail output swing," IEEE JSSC 34:7, pp. 971-7, Jul. '99.
6. Ho et al., "Optical interconnect for high-end computer systems," IEEE D&T of Computers 27:4, pp. 10-19, Aug. '10.