A 10b 320 MS/s 40 mW open-loop interpolated pipeline ADC

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2011, Pages 126-127

  Miyahara, Masaya ^a   Lee, Hyunui ^a   Paik, Daehwa ^a   Matsuzawa, Akira ^a  

^a TOKYO INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

ADC; interpolation and CMOS; open loop; pipeline

Indexed keywords

ADC; CONTROLLED CAPACITORS; CONVERSION RATES; OPEN LOOPS; OPEN-LOOP AMPLIFIERS; PIPELINE ADCS;

INTERPOLATION; PIPELINES;

VLSI CIRCUITS;

EID: 80052664750     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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