A 75μW, 16-channel neural spike-sorting processor with unsupervised clustering

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 2011, Pages 252-253

  Karkare, Vaibhav ^a   Gibson, Sarah ^a   Yang, Chia Hsiang ^a   Chen, Henry ^a   Marković, Dejan ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DISTANCE METRICS; NOISE-TOLERANT; ONLINE-CLUSTERING; SPIKE-SORTING; TWO-STAGE CLUSTERING; UNSUPERVISED CLUSTERING;

NEURAL NETWORKS; VLSI CIRCUITS;

CLUSTERING ALGORITHMS;

EID: 80052647817     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. R. Ollson and K. Wise, IEEE JSSC, Dec. 2005.
2. M. Chae et al., ISSCC Dig. Tech. Papers, Feb. 2008.
3. V. Karkare, S. Gibson, and D. Marković, A-SSCC, Nov. 2009.
4. U. Rutishauser et al., J. Neuroscience Methods, 2006.