Low-temperature hybrid CMOS circuits based on chalcogenides and organic TFTs

IEEE Electron Device Letters

Volumn 32, Issue 8, 2011, Pages 1086-1088

  Mejia, Israel ^a   Salas Villasenor, Ana L ^a   Avendano Bolivar, Adrian ^a   Horvath, Julius ^a   Stiegler, Harvey ^a   Gnade, Bruce E ^a   Quevedo Lopez, Manuel A ^a  

^a The University of Texas at Dallas   (United States)

Author keywords

Cadmium sulfide (CdS); complementary metal oxide semiconductor (CMOS); flexible electronics; pentacene; thin film transistor (TFT)

Indexed keywords

CDS; CHEMICAL-BATH DEPOSITION; CMOS INTEGRATION; COMPLEMENTARY METAL OXIDE SEMICONDUCTORS; FULLY INTEGRATED; HYBRID CMOS; LOW TEMPERATURES; MOBILITY VALUE; ORGANIC TFTS; PENTACENES; PROCESSING TEMPERATURE;

CADMIUM; CADMIUM COMPOUNDS; CADMIUM SULFIDE; CHALCOGENIDES; DIELECTRIC DEVICES; DIGITAL CIRCUITS; FLEXIBLE ELECTRONICS; INTEGRATION; PROCESSING; SEMICONDUCTING ORGANIC COMPOUNDS; THIN FILM TRANSISTORS; THRESHOLD VOLTAGE; TRANSISTORS;

CMOS INTEGRATED CIRCUITS;

EID: 79960912030     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/LED.2011.2157801     Document Type: Article

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