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Volumn , Issue , 2010, Pages 326-329

Energy efficient computation with self-adaptive single-ended body bias

Author keywords

[No Author keywords available]

Indexed keywords

BATTERY LIFE TIME; BODY BIAS; CIRCUIT OPTIMIZATION; COMPUTING APPLICATIONS; CRITICAL CHALLENGES; ENERGY EFFICIENT; IDLE MODE; LOW-POWER DESIGN; LOWER ENERGIES; PERFORMANCE TRADE-OFF; PRECHARGE-EVALUATE LOGIC; SELF-ADAPTIVE; SINGLE-ENDED;

EID: 79960726091     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/SOCC.2010.5784687     Document Type: Conference Paper
Times cited : (2)

References (7)
  • 2
    • 2442647559 scopus 로고    scopus 로고
    • Ultra-low voltage circuits and processor in 180nm to 90nm technologies with a swapped-body biasing technique
    • 15-19 Feb.
    • Narendra, Siva G. et. al., "Ultra-low voltage circuits and processor in 180nm to 90nm technologies with a swapped-body biasing technique", ISSCC, pp. 156-518 vol.1, 15-19 Feb. 2004.
    • (2004) ISSCC , vol.1 , pp. 156-518
    • Narendra Siva, G.1
  • 6
    • 0033696540 scopus 로고    scopus 로고
    • Skewed cmos: Noise-immune high-performance low-power static circuit family
    • Sept
    • A. Solomatnikov et al., "Skewed CMOS: Noise-Immune High-Performance Low-Power Static Circuit Family," International Conference on Computer Design, Sept 2000, pp. 241-246.
    • (2000) Ternational Conference on Computer Design , pp. 241-246
    • Solomatnikov, A.1
  • 7
    • 79960716416 scopus 로고
    • A 4.5ns 96B CMOS adder design
    • Naini, A., et. al., "A 4.5ns 96B CMOS Adder Design," IEEE CICC 1992, pp. 25.5.1-25.5.4.
    • (1992) IEEE CICC , pp. 2551-2554
    • Naini, A.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.