-
1
-
-
41149102249
-
Model checking of synchronous timing diagram
-
November
-
Amla, N., Emerson, E., Kurshan, R., and Namjoshi, K: Model checking of synchronous timing diagram,. Conference on Formal Methods in Computer Aided Design (FMCAD), Proceedings, November 2000.
-
(2000)
Conference on Formal Methods in Computer Aided Design (FMCAD), Proceedings
-
-
Amla, N.1
Emerson, E.2
Kurshan, R.3
Namjoshi, K.4
-
2
-
-
0008639363
-
Timing diagrams: Formalization and algorithmic verification
-
July
-
Fisler, K.: Timing diagrams: Formalization and algorithmic verification. Journal of Logic, Language, and Information, 8(7), July 1999.
-
(1999)
Journal of Logic, Language, and Information
, vol.8
, Issue.7
-
-
Fisler, K.1
-
3
-
-
0012364624
-
Modular modelling of closed-loop systems
-
Berlin, Germany, October 21-22, Proceedings
-
Hanisch, H.-M. and Lüder, A.: Modular Modelling of Closed-Loop Systems, Colloquium on Petri Net Technologies for Modelling Communication Based Systems, Berlin, Germany, October 21-22, 1999, Proceedings, pp. 103-126.
-
(1999)
Colloquium on Petri Net Technologies for Modelling Communication Based Systems
, pp. 103-126
-
-
Hanisch, H.-M.1
Lüder, A.2
-
4
-
-
0008622037
-
System verification using user-friendly interfaces
-
IEEE Computer Society Press
-
Schlör, R., Allara, A. and Comai, S.: System Verification using User-Friendly Interfaces. In Design, Automation and Test in Europe, pp. 167- 172. IEEE Computer Society Press, 1999.
-
(1999)
Design, Automation and Test in Europe
, pp. 167-172
-
-
Schlör, R.1
Allara, A.2
Comai, S.3
-
5
-
-
0029512197
-
Net condition/event systems with multiple condition outputs
-
Paris, France, October, INRIA/IEEE
-
Rausch, M. and Hanisch, H.-M.: Net condition/event systems with multiple condition outputs. In Symposium on Emerging Technologies and Factory Automation, volume 1, p. 592-600, Paris, France, October, 1995. INRIA/IEEE.
-
(1995)
Symposium on Emerging Technologies and Factory Automation
, vol.1
, pp. 592-600
-
-
Rausch, M.1
Hanisch, H.-M.2
-
7
-
-
0012436185
-
-
Humboldt Universität zu Berlin, Institut für Informatik
-
SESA - Signal/Net system analyzer. Humboldt Universität zu Berlin, Institut für Informatik, http://www.informatik.huberlin.de/lehrstuehle/ automaten/tools/.
-
SESA - Signal/Net System Analyzer
-
-
-
8
-
-
41149150033
-
Symbolische Erreichbarskeitanalyse und automatische Implementierung struktuirter
-
Dissertation zur Erlagung des Grades Dr.-Ing, Berlin: Logos Verl
-
Thieme, J. Symbolische Erreichbarskeitanalyse und automatische Implementierung struktuirter, zeitbewerter Steuerungsmodelle, Dissertation zur Erlagung des Grades Dr.-Ing., Berlin: Logos Verl., 2002.
-
(2002)
Zeitbewerter Steuerungsmodelle
-
-
Thieme, J.1
-
10
-
-
0037296637
-
Verification of distributed control systems in intelligent manufacturing
-
Vyatkin, V. and Hanisch, H.-M.: Verification of Distributed Control Systems in Intelligent Manufacturing, Journal of Intelligent Manufacturing, special issue on Internet Based Modelling in Intelligent Manufacturing, vol.14, N.1, 2003, pp.123-136.
-
(2003)
Journal of Intelligent Manufacturing, Special Issue on Internet Based Modelling in Intelligent Manufacturing
, vol.14
, Issue.1
, pp. 123-136
-
-
Vyatkin, V.1
Hanisch, H.-M.2
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