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Volumn , Issue , 2010, Pages 1722-1727
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The digital silicon photomultiplier - System architecture and performance evaluation
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Author keywords
[No Author keywords available]
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Indexed keywords
ACTIVE QUENCHING;
CHIP DESIGN;
DATA PACKET;
DETECTOR CELL;
DIGITAL IMPLEMENTATION;
DIGITAL SIGNALS;
ELECTRONIC NOISE;
SELECTIVE ACTIVATION;
SENSOR ARCHITECTURES;
SENSORLESS;
SERIAL DATA;
SILICON PHOTOMULTIPLIER;
SINGLE-ENDED;
SINGLE-PHOTON AVALANCHE PHOTODIODES;
STANDARD CMOS PROCESS;
SYSTEM ARCHITECTURES;
TECHNOLOGY DEMONSTRATORS;
TEMPERATURE VARIATION;
TEST INPUTS;
TIME TO DIGITAL CONVERTERS;
CMOS INTEGRATED CIRCUITS;
GAMMA RAYS;
INTEGRATION;
MULTIPHOTON PROCESSES;
NETWORK ARCHITECTURE;
NUCLEAR PHYSICS;
PHOTOMULTIPLIERS;
PHOTONS;
SEMICONDUCTING SILICON;
SENSORS;
SILICON DETECTORS;
MEDICAL IMAGING;
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EID: 79960295095
PISSN: 10957863
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/NSSMIC.2010.5874069 Document Type: Conference Paper |
Times cited : (85)
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References (6)
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