Partial-coherence abstractions for relaxed memory models

Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI)

Volumn , Issue , 2011, Pages 187-198

  Kuperstein, Michael ^a   Vechev, Martin ^b   Yahav, Eran ^a  

^a TECHNION ISRAEL INSTITUTE OF TECHNOLOGY   (Israel)

^b IBM T J WATSON RESEARCH CENTER   (United States)

Author keywords

abstract interpretation; concurrency; relaxed memory models; synthesis; weak memory models

Indexed keywords

BLENDING; FENCES; MODEL CHECKING; SEMANTICS; SPECIFICATIONS;

ABSTRACT INTERPRETATIONS; AUTOMATIC VERIFICATION; CONCURRENCY; CONCURRENTS PROGRAMS; FINITE STATE PROGRAM; HARD PROBLEMS; PARTIAL-COHERENCE; RELAXED MEMORY MODELS; SAFETY SPECIFICATIONS; WEAK MEMORY MODELS;

ABSTRACTING;

EID: 79959882075     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1993498.1993521     Document Type: Conference Paper

References (41)

1. ADVE, S. V., AND GHARACHORLOO, K. Shared memory consistency models: A tutorial. IEEE Computer 29 (1995), 66-76.
2. ATIG, M. F., BOUAJJANI, A., BURCKHARDT, S., AND MUSUVATHI, M. On the verification problem for weak memory models. In POPL (2010), pp. 7-18.
3. BOEHM, H.-J. Threads cannot be implemented as a library. SIGPLAN Not. 40, 6 (2005), 261-268.
4. BOIGELOT, B., GODEFROID, P., WILLEMS, B., AND WOLPER, P. The power of QDDs. In SAS (1997), Springer, pp. 172-186.
5. BURCKHARDT, S., ALUR, R., AND MARTIN, M. M. K. Check- Fence: checking consistency of concurrent data types on relaxed memory models. In PLDI (2007), pp. 12-21.
6. BURCKHARDT, S., AND MUSUVATHI, M. Effective program verification for relaxed memory models. In CAV (2008), pp. 107-120.
7. BURNIM, J., SEN, K., AND STERGIOU, C. Sound and complete monitoring of sequential consistency in relaxed memory models. Tech. Rep. UCB/EECS-2010-31.
8. BURNIM, J., SEN, K., AND STERGIOU, C. Testing concurrent programs on relaxed memory models. Tech. Rep. UCB/EECS-2010-32.
9. COUSOT, P., AND COUSOT, R. Abstract interpretation: A unified lattice model for static analysis of programs by construction of approximation of fixed points. In POPL (1977), pp. 238-252.
10. COUSOT, P., AND COUSOT, R. Systematic design of program analysis frameworks. In POPL (1979), pp. 269-282.
11. DIJKSTRA, E. Cooperating sequential processes, TR EWD-123. Tech. rep., Technological University, Eindhoven, 1965.
12. FANG, X., LEE, J., AND MIDKIFF, S. P. Automatic fence insertion for shared memory multiprocessing. In ICS (2003), pp. 285-294.
13. GALL, T. L., JEANNET, B., AND JRON, T. Verification of communication protocols using abstract interpretation of FIFO queues. In AMAST (2006), pp. 204-219.
14. HENSGEN, D., FINKEL, R., AND MANBER, U. Two algorithms for barrier synchronization. Int. J. Parallel Program. 17, 1 (1988), 1-17.
15. HUYNH, T. Q., AND ROYCHOUDHURY, A. Memory model sensitive bytecode verification. Form. Methods Syst. Des. 31, 3 (2007).
16. IBM. Power ISA v.2.05. 2007.
17. JONSSON, B. State-space exploration for concurrent algorithms under weak memory orderings: (preliminary version). SIGARCH Comput. Archit. News 36, 5 (2008), 65-71.
18. KUPERSTEIN, M., VECHEV, M., AND YAHAV, E. Automatic inference of memory fences. In FMCAD (2010), pp. 111-119.
19. LAMPORT, L. A new solution of Dijkstra's concurrent programming problem. Commun. ACM 17, 8 (1974), 453-455.
20. LAMPORT, L. How to make a multiprocessor computer that correctly executes multiprocess program. IEEE Trans. Comput. 28, 9 (1979), 690-691.
21. LAMPORT, L. A fast mutual exclusion algorithm. ACM Trans. Comput. Syst. 5, 1 (1987), 1-11.
22. LEE, J., AND PADUA, D. A. Hiding relaxed memory consistency with a compiler. IEEE Trans. Comput. 50, 8 (2001), 824-833.
23. LINDEN, A., AND WOLPER, P. An automata-based symbolic approach for verifying programs on relaxed memory models. In SPIN (2010), pp. 212-226.
24. MADOR-HAIM, S., ALUR, R., AND MARTIN, M. M. K. Generating litmus tests for contrasting memory consistency models. In CAV (2010), pp. 273-287.
25. MADOR-HAIM, S., ALUR, R., AND MILO, M. Plug and Play Components for the Exploration of Memory Consistency Models. Tech. Rep. MS-CIS-10-02, University of Pennsylvania, 2010.
26. MAGNUSSON, P. S., LANDIN, A., AND HAGERSTEN, E. Queue locks on cache coherent multiprocessors. In Proceedings of the Int. Symp. on Parallel Processing (1994), IEEE, pp. 165-171.
27. NARAYANASAMY, S., WANG, Z., TIGANI, J., EDWARDS, A., AND CALDER, B. Automatically classifying benign and harmful data races using replay analysis. In PLDI (2007), pp. 22-31.
28. OWENS, S. Reasoning about the implementation of concurrency abstractions on x86-TSO. In ECOOP (2010).
29. OWENS, S., SARKAR, S., AND SEWELL, P. A better x86 memory model: x86-TSO. In TPHOLs (2009), pp. 391-407.
30. PARK, S., AND DILL, D. L. An executable specification and verifier for relaxed memory order. IEEE Trans. on Computers 48 (1999).
31. PETERSON, G. L. Myths about the mutual exclusion problem. Inf. Process. Lett. 12, 3 (1981), 115-116.
32. SARASWAT, V. A., JAGADEESAN, R., MICHAEL, M., AND VON PRAUN, C. A theory of memory models. In PPoPP (2007), ACM, pp. 161-172.
33. SARKAR, S., SEWELL, P., NARDELLI, F. Z., OWENS, S., RIDGE, T., BRAIBANT, T., MYREEN, M. O., AND ALGLAVE, J. The semantics of x86-cc multiprocessor machine code. In POPL (2009), pp. 379-391.
34. SHASHA, D., AND SNIR, M. Efficient and correct execution of parallel programs that share memory. ACM Trans. Program. Lang. Syst. 10, 2 (1988), 282-312.
35. SHEN, X., ARVIND, AND RUDOLPH, L. Commit-reconcile & fences (CRF): a new memory model for architects and compiler writers. SIGARCH Comput. Archit. News 27, 2 (1999), 150-161.
36. SPARC INTERNATIONAL, INC. The SPARC architecture manual (version 9). Prentice-Hall, Inc., Upper Saddle River, NJ, USA, 1994.
37. VECHEV, M., AND YAHAV, E. Deriving linearizable fine-grained concurrent objects. In PLDI (2008), pp. 125-135.
38. VECHEV, M., YAHAV, E., AND YORSH, G. Abstraction-guided synthesis of synchronization. In POPL (2010), pp. 327-338.
39. VECHEV, M. T., YAHAV, E., BACON, D. F., AND RINETZKY, N. CGCExplorer: a semi-automated search procedure for provably correct concurrent collectors. In PLDI (2007), pp. 456-467.
40. VECHEV, M. T., YAHAV, E., AND YORSH, G. Inferring synchronization under limited observability. In TACAS (2009), pp. 139-154.
41. YANG, Y., GOPALAKRISHNAN, G., AND LINDSTROM, G. UMM: an operational memory model specification framework with integrated model checking capability. Concurr. Comput. : Pract. Exper. 17, 5-6 (2005), 465-487.