Reduced switching loss pulse width modulation technique for three-level diode clamped inverter

IET Power Electronics

Volumn 4, Issue 4, 2011, Pages 393-399

  Chaturvedi, P K ^a   Jain, S ^b   Agarwal, P ^c  

^a SAMRAT ASHOK TECHNOLOGICAL INSTITUTE   (India)

^b MAULANA AZAD NATIONAL INSTITUTE OF TECHNOLOGY   (India)

^c INDIAN INSTITUTE OF TECHNOLOGY ROORKEE   (India)

Author keywords

[No Author keywords available]

Indexed keywords

CLOSED-LOOP CONTROL; DIODE CLAMPED INVERTER; EFFICIENCY IMPROVEMENT; FUNDAMENTAL WAVE; HALF CYCLE; HIGH-POWER; HIGH-VOLTAGES; MATHEMATICAL EXPRESSIONS; MODULATION TECHNIQUES; MULTILEVEL INVERTER; PWM TECHNIQUES; REDUCED SWITCHING; SOFT-SWITCHING TECHNIQUE; SWITCHING LOSS; THREE-LEVEL; THREE-LEVEL INVERTERS;

ELECTRIC INVERTERS; FREQUENCY MODULATION; MATHEMATICAL TECHNIQUES; POWER CONVERTERS; PULSE WIDTH MODULATION; SOFT SWITCHING; VECTOR SPACES;

SWITCHING;

EID: 79959719840     PISSN: 17554535     EISSN: 17554543     Source Type: Journal    
DOI: 10.1049/iet-pel.2010.0311     Document Type: Article

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