메뉴 건너뛰기




Volumn 6792 LNCS, Issue PART 2, 2011, Pages 389-396

On the designing of spikes band-pass filters for FPGA

Author keywords

band pass filter; neuromorphic engineering; Spike processing

Indexed keywords

BAND PASS; CODED SIGNAL; COMPLEX HARDWARE; FLOATING-POINT ARITHMETIC; FREQUENCY COMPONENTS; MASSIVELY PARALLEL PROCESSING; NEUROMORPHIC ENGINEERING; OUT-OF-BAND; Q-FACTORS; QUALITY FACTORS; SPIKE PROCESSING;

EID: 79959360752     PISSN: 03029743     EISSN: 16113349     Source Type: Book Series    
DOI: 10.1007/978-3-642-21738-8_50     Document Type: Conference Paper
Times cited : (11)

References (17)
  • 1
    • 38849206826 scopus 로고    scopus 로고
    • A 128x128 120dB 15 us Asynchronous Temporal Contrast Vision Sensor
    • Lichtsteiner, P., et al.: A 128x128 120dB 15 us Asynchronous Temporal Contrast Vision Sensor. IEEE Journal on Solid-State Circuits 43(2) (2008)
    • (2008) IEEE Journal on Solid-State Circuits , vol.43 , Issue.2
    • Lichtsteiner, P.1
  • 2
    • 33847616026 scopus 로고    scopus 로고
    • AER EAR: A Matched Silicon Cochlea Pair with Address Event Representation Interface
    • Chan, V., et al.: AER EAR: A Matched Silicon Cochlea Pair With Address Event Representation Interface. IEEE TCAS I 54(1) (2007)
    • (2007) IEEE TCAS I , vol.54 , Issue.1
    • Chan, V.1
  • 3
    • 48949116215 scopus 로고    scopus 로고
    • On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing
    • Serrano-Gotarredona, R., et al.: On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing. IEEE TNN 19(7) (2008)
    • (2008) IEEE TNN , vol.19 , Issue.7
    • Serrano-Gotarredona, R.1
  • 5
    • 34047217409 scopus 로고    scopus 로고
    • Adaptive WTA with an Analog VLSI Neuromorphic Learning Chip
    • Hafliger, P.: Adaptive WTA with an Analog VLSI Neuromorphic Learning Chip. IEEE Transactions on Neural Networks 18(2) (2007)
    • (2007) IEEE Transactions on Neural Networks , vol.18 , Issue.2
    • Hafliger, P.1
  • 6
    • 33244465845 scopus 로고    scopus 로고
    • A VLSI Array of Low-Power Spiking Neurons and Bistables Synapses with Spike-Timing Dependant Plasticity
    • Indiveri, G., et al.: A VLSI Array of Low-Power Spiking Neurons and Bistables Synapses with Spike-Timing Dependant Plasticity. IEEE Trans. on Neural Networks 17(1) (2006)
    • (2006) IEEE Trans. on Neural Networks , vol.17 , Issue.1
    • Indiveri, G.1
  • 12
    • 70349253937 scopus 로고    scopus 로고
    • CAVIAR: A 45k-neuron, 5M-synapse AER Hardware Sensory-Processing- Learning-Actuating System for High-Speed Visual Object Recognition and Tracking
    • Serrano-Gotarredona, R., et al.: CAVIAR: A 45k-neuron, 5M-synapse AER Hardware Sensory-Processing-Learning-Actuating System for High-Speed Visual Object Recognition and Tracking. IEEE Trans. on Neural Networks 20(9) (2009)
    • (2009) IEEE Trans. on Neural Networks , vol.20 , Issue.9
    • Serrano-Gotarredona, R.1
  • 13
    • 25144437405 scopus 로고    scopus 로고
    • Two hardware implementations of the exhaustive synthetic AER generation method
    • Cabestany, J., Prieto, A.G., Sandoval, F. (eds.) IWANN 2005 Springer, Heidelberg
    • Gomez-Rodriguez, F., Paz, R., Miro, L., Linares-Barranco, A., Jimenez, G., Civit, A.: Two hardware implementations of the exhaustive synthetic AER generation method. In: Cabestany, J., Prieto, A.G., Sandoval, F. (eds.) IWANN 2005. LNCS, vol. 3512, pp. 534-540. Springer, Heidelberg (2005)
    • (2005) LNCS , vol.3512 , pp. 534-540
    • Gomez-Rodriguez, F.1    Paz, R.2    Miro, L.3    Linares-Barranco, A.4    Jimenez, G.5    Civit, A.6


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.