A VLSI architecture design of CAVLG decoder

IEEE International Symposium on Semiconductor Manufacturing Conference Proceedings

Volumn 2, Issue , 2003, Pages 962-965

  Di, Wu ^a,c   Wen, Gao ^a,b,c   Hu, Mingzeng ^a   Ji, Zhenzhou ^a  

^a HARBIN INSTITUTE OF TECHNOLOGY   (China)

^b INSTITUTE OF GEOLOGY AND GEOPHYSICS   (China)

^c Academy of Science   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; IMAGE CODING; IMAGE COMPRESSION; INTEGRATED CIRCUIT DESIGN; MOTION PICTURE EXPERTS GROUP STANDARDS; VLSI CIRCUITS;

CONTEXT-BASED ADAPTIVE VARIABLE LENGTH CODING; INTEGRAL COMPONENTS; INTERNATIONAL STANDARDS; NOVEL ARCHITECTURE; PIPELINE ARCHITECTURE; VARIABLE LENGTH CODES; VIDEO APPLICATIONS; VLSI ARCHITECTURES;

DECODING;

EID: 79958266985     PISSN: 1523553X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASIC.2003.1277371     Document Type: Conference Paper

References (7)

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