Schedulability analysis for real time on-chip communication with wormhole switching

International Journal of Embedded and Real-Time Communication Systems

Volumn 1, Issue 2, 2010, Pages 1-22

  Shi, Zheng ^a   Burns, Alan ^a   Indrusiak, Leandro Soares ^a  

^a UNIVERSITY OF YORK   (United Kingdom)

Author keywords

Communication; Computer architecture; Embedded systems; Real time systems; Wormhole switching

Indexed keywords

EID: 79957564087     PISSN: 19473176     EISSN: 19473184     Source Type: Journal    
DOI: 10.4018/jertcs.2010040101     Document Type: Article

References (23)

1. Audsley, N., Burns, A., Richardson, M., Tindell, K., & Wellings, A. (1993). Applying new scheduling theory to static priority pre-emptive scheduling. Software Engineering Journal, 8, 284-292.
2. Balakrishnan, S., & Ozguner, F. (1998). A prioritydriven flow control mechanism for real-time traffic in multiprocessor networks. IEEE Transactions on Parallel and Distributed Systems, 9(7), 664-678. doi:10.1109/71.707545 (Pubitemid 128743604)
3. Benini, L., & De Micheli, G. (2001). Powering networks on chips. In Proceedings of the International Symposium on System Synthesis.
4. Benini, L., & De Micheli, G. (2002). Networks on chips: A new SoC paradigm. Computer, 35(1), 70-78. doi:10.1109/2.976921 (Pubitemid 34069383)
5. Bjerregaard, T., & Sparso, J. (2004). Virtual channel designs for guaranteeing bandwidth in asynchronous network-on-chip. In Proceedings of the 2nd Norchip Conference.
6. Dally, W. (1992). Virtual-channel flow control. IEEE Transactions on Parallel and Distributed Systems, 3(2), 194-205. doi:10.1109/71.127260
7. Dally, W., & Towles, B. (2001). Route packets, not wires: On-chip interconnection networks. In Proceedings of the 38th Desing Automation Conference (DAC).
8. Duato, J., Yalamanchili, S., & Ni, L. (2002). Interconnection networks: an engineering approach. San Francisco, CA: Morgan Kaufmann.
9. Furber, S., & Bainbridge, J. (2005). Future trends in SoC interconnect. In Proceedings of the IEEE international symposium on VLSI design, automation and test.
10. Goossens, K., Dielissen, J., & Radulescu, A. (2005). Æthereal network on chip: concepts, architectures, and implementations. IEEE Design & Test of Computers, 22(5), 414-421. doi:10.1109/MDT.2005.99 (Pubitemid 41522729)
11. Hary, S., & Ozguner, F. (1997). Feasibility test for real-time communication using wormhole routing. IEE Proceedings. Computers and Digital Techniques, 144(5), 273-278. doi:10.1049/ip-cdt:19971369 (Pubitemid 127755301)
12. Henkel, J., Wolf, W., & Chakradhar, S. (2004). Onchip networks: A scalable, communication-centric embedded system design paradigm. In Proceedings of the 17th International Conference on VLSI Design.
13. Indrusiak, L., Ost, L., Möller, L., Moraes, F., & Glesner, M. (2008). Applying UML Interactions and Actor-oriented Simulation to the Design Space Exploration of Network-on-Chip Interconnects. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI (pp. 491-494).
14. Kavaldjiev, N., & Smit, G. (2003). A survey of efficient on-chip communications for SoC. In Proceedings of the 4th Progress Symposium on Embedded Systems, 129-140.
15. Kim, B., Kim, J., Hong, S., & Lee, S. (1998). A realtime communication method for wormhole switching networks. In Proceedings of the International Conference on Parallel Processing.
16. Lehoczky, J. (1990). Fixed priority scheduling of periodic task sets with arbitrary deadlines. In Proceedings of the IEEE Real Time Sytem Symposium.
17. Liu, C., & Layland, J. (1973). Scheduling algorithms for multiprogramming in a hard-real-time environment. Journal of the Association for computing Machinery, 20(1), 46-61.
18. Lu, Z., Jantsch, A., & Sander, I. (2005). Feasibility analysis of messages for on-chip networks using wormhole routing. In Proceedings of the Conferenece on Asia South Pacific Design Automation.
19. Maatta, S., Indrusiak, L., Ost, L., Moller, L., Nurmi, J., Glesner, M., et al. (2008). Validation of executable application models mapped onto network-on-chip platforms. In Proceedings of the International Symposium on Industrial Embedded Systems.
20. Moraes, F., Calazans, N., Mello, A., Möller, L., & Ost, L. (2004). HERMES: an infrastructure for low area overhead packet-switching networks on chip. Integration, the VLSI Journal, 38(1), 69-93.
21. Mutka, M. (1994). Using rate monotonic scheduling technology for real-timecommunications in a wormhole network. In Proceedings of the 2nd workshop on parallel and distributed real time systems.
22. Ni, L., & McKinley, P. (1993). A survey of wormhole routing techniques in direct networks. IEEE computer, 26(2), 62-76.
23. Tindell, K., Burns, A., & Wellings, A. (1994). An extendible approach for analyzing fixed priority hard real-time tasks. Real-Time Systems Journal, 6(2), 133-151. doi:10.1007/BF01088593