Advanced strain engineering for state-of-the-art nanoscale CMOS technology

Science China Information Sciences

Volumn 54, Issue 5, 2011, Pages 946-958

  Yang, Bin ^a   Cai, Ming ^b  

^a IBM MICROELECTRONICS   (United States)

^b IBM RESEARCH   (United States)

Author keywords

Dual stress liners; Embedded Si:C; Embedded SiGe; High K metal gate; Strained silicon; Stress memorization technique

Indexed keywords

EID: 79955824771     PISSN: 1674733X     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11432-011-4224-9     Document Type: Article

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