A 40nm CMOS highly linear 0.4-to-6GHz receiver resilient to 0dBm out-of-band blockers

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2011, Pages 62-63

  Borremans, Jonathan ^a   Mandal, Gunjan ^a   Giannini, Vito ^a   Sano, Tomohiro ^b   Ingels, Mark ^a   Verbruggen, Bob ^a   Craninckx, Jan ^a  

^a IMEC   (Belgium)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ANTENNAS; BANDPASS FILTERS; BUILDINGS; CMOS INTEGRATED CIRCUITS; MIXERS (MACHINERY);

40NM CMOS; FRONT END; HARMONIC REJECTION; LO FEEDTHROUGH; OUT OF BAND; OUT-OF-BAND INTERFERENCES;

LOW NOISE AMPLIFIERS;

EID: 79955728149     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISSCC.2011.5746220     Document Type: Conference Paper

References (7)

1. 2 40nm LP CMOS 0.1-to-3GHz multistandard transceiver", ISSCC Dig. Tech. Papers, pp. 458-459, Feb. 2010.
2. Z. Ru, N. A. Moseley, E. Klumperink, B. Nauta, "Digitally Enhanced Software- Defined Radio Receiver Robust to Out-of-Band Interference", J. Solid-State Circuits, Vol. 44, No. 12, pp. 3359-3375, Dec. 2009.
3. M. Soer, E. Klumperink, Z. Ru, F. E. van Vliet, B. Nauta, "A 0.2-to-2.0GHz 65nm CMOS receiver without LNA achieving >11dBm IIP3 and <6.5 dB NF", ISSCC Dig. Tech. Papers, pp.222-223, Feb. 2009.
4. A. Mirzaie, A. Yazdi, Z. Zhou, E. Chang, P. Suri, H. Darabi, "A 65nm CMOS Quad-Band SAW-Less Receiver for GSM/GPRS/EDGE", VLSI Dig. of Tech. Papers, pp.179-180, June 2010.
5. B. W. Cook, A. Berny, A. Molnar, S. Lanzisera, K. S. J. Pister, "Low-Power 2.4-GHz Transceiver With Passive RX Font-End and 400-mV Supply", J. Solid- State Circuits, Vol. 41, No. 12, pp. 2757-2766, Dec. 2006.
6. 3 and +2dBm Blocker Compression Point", Proc. of ESSCIRC, Sept. 2010.
7. H. Darabi, "A Blocker Filtering Technique for SAW-Less Wireless Receivers", IEEE J. Solid-State Circuits, Vol. 42, No. 12, Dec. 2007.