A dual-channel ferroelectric-gate field-effect transistor enabling nand-type memory characteristics

IEEE Transactions on Electron Devices

Volumn 58, Issue 5, 2011, Pages 1311-1318

  Kaneko, Yukihiro ^a   Tanaka, Hiroyuki ^a,b   Ueda, Michihito ^a   Kato, Yoshihisa ^a   Fujii, Eiji ^a  

^a PANASONIC CORPORATION   (Japan)

^b IMEC   (Belgium)

Author keywords

Disturb free; dual gate; ferroelectric gate; ferroelectric memories; ferroelectric gate field effect transistor (FeFET); nand; nonvolatile memory; ZnO

Indexed keywords

DISTURB FREE; DUAL GATES; FERROELECTRIC GATE; FERROELECTRIC MEMORIES; FERROELECTRIC-GATE FIELD-EFFECT TRANSISTOR (FEFET); NAND; NON-VOLATILE MEMORIES; ZNO;

FERROELECTRIC DEVICES; FERROELECTRICITY; LEAD; OXIDE FILMS; SEMICONDUCTING SILICON COMPOUNDS; THIN FILM TRANSISTORS; ZINC OXIDE; ZIRCONIUM;

FIELD EFFECT TRANSISTORS;

EID: 79955531967     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2011.2110653     Document Type: Article

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