UltraSONIC: A reconfigurable architecture for video image processing

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

Volumn 2438, Issue , 2002, Pages 482-491

  Haynes, Simon D ^a   Epsom, Henry G ^a   Cooper, Richard J ^a   McAlpine, Paul L ^a  

^a Sony Broadcast and Professional Research Labs   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

COMPRESSED VIDEO; DYNAMIC RE-CONFIGURATION; FLEXIBLE ARCHITECTURES; HARDWARE AND SOFTWARE; HARDWARE RESOURCES; HARDWARE/SOFTWARE CO-DESIGN; HIGH DEFINITION VIDEO; NEW APPLICATIONS; NOVEL METHODS; OFF-LINE SOFTWARES; PARALLEL DEVELOPMENT; RAPID DEVELOPMENT; REALTIME PROCESSING; RECONFIGURABLE ARCHITECTURE; RECONFIGURABLE DESIGNS; RECONFIGURABLE LOGIC; RESEARCH LABS; SOFTWARE INTERFACES; SYSTEM LEVELS; TIME STANDARD; VIDEO IMAGE PROCESSING; VIDEO PROCESSING;

ABSTRACTING; COMPUTER ARCHITECTURE; DESIGN; DYNAMIC MODELS; HARDWARE; IMAGE COMPRESSION; IMAGING SYSTEMS; MOTION PICTURE EXPERTS GROUP STANDARDS; RECONFIGURABLE HARDWARE; ULTRASONICS;

COMPUTER HARDWARE;

EID: 79955152352     PISSN: 03029743     EISSN: 16113349     Source Type: Journal    
DOI: 10.1007/3-540-46117-5_51     Document Type: Article

References (6)

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4. 10-Bit 4:2:2 Component and 4fsc Composite Digital Signals Serial Digital Interface, SMPTE Standard, ANSI/SMPTE 259M-1997, September 25, 1997
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6. Daemen, J., Rijmen, V.: AES Proposal: Rijndael, NIST AES Proposal, 1998.