A full digital low power DPSK demodulator and clock recovery circuit for high data rate neural implants

2010 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2010 - Proceedings

Volumn , Issue , 2010, Pages 571-574

  Ghenim, Aymen ^a   Ghorbel, Mohamed ^a   Ben Hamida, Ahmed ^a  

^a UNIVERSITY OF SFAX   (Tunisia)

Author keywords

Demodulator; Differential phase shift keying (DPSK); High data rate; Implants; Inductive link; Low power; Non coherent

Indexed keywords

DIFFERENTIAL PHASE-SHIFT KEYING; HIGH DATA RATE; IMPLANTS; INDUCTIVE LINK; LOW POWER; NON-COHERENT;

CMOS INTEGRATED CIRCUITS; DATA COMMUNICATION SYSTEMS; DEMODULATION; DEMODULATORS; ELECTRIC CLOCKS; PHASE SHIFT; SIGNAL RECEIVERS;

PHASE SHIFT KEYING;

EID: 79953102895     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICECS.2010.5724576     Document Type: Conference Paper

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