PEARL: Power-aware, dependable, and high-performance communication link using PCI express

Proceedings - 2010 IEEE/ACM International Conference on Green Computing and Communications, GreenCom 2010, 2010 IEEE/ACM International Conference on Cyber, Physical and Social Computing, CPSCom 2010

Volumn , Issue , 2010, Pages 284-291

  Hanawa, Toshihiro ^a   Boku, Taisuke ^a   Miura, ShiN'Ichi ^a   Sato, Mitsuhisa ^a   Arimoto, Kazutami ^b  

^a UNIVERSITY OF TSUKUBA   (Japan)

^b RENESAS TECHNOLOGY CORP   (Japan)

Author keywords

Dependable system; Embedded system; Fault tolerant network; PCI express; Power aware cluster

Indexed keywords

COMMUNICATION LINKS; DEPENDABLE SYSTEMS; DIRECT COMMUNICATIONS; FAULT-TOLERANT NETWORK; FOUR-CORE; HIGH-PERFORMANCE CLUSTERS; NETWORK INTERFACE CARDS; PCI EXPRESS; POWER-AWARE; POWER-AWARE CLUSTER;

COMMUNICATION; GEMS; INTERFACES (COMPUTER); PARALLEL PROCESSING SYSTEMS; TELECOMMUNICATION SYSTEMS;

EMBEDDED SYSTEMS;

EID: 79953086056     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/GreenCom-CPSCom.2010.115     Document Type: Conference Paper

References (14)

1. T. Hanawa, T. Boku, S. Miura, T. Okamoto, M. Sato, and K. Arimoto, "Low-power and high-performance communication mechanism for dependable embedded systems," in Proceedings of 2008 International Workshop on Innovative Architecture for Future Generation Processors and Systems, Jan 2008.
2. PCI Express Base Specification, Rev. 2.0, PCI-SIG, Dec. 2006.
3. The Infiniband architecture specification. Infiniband Trade Association. [Online]. Available: http://www.infinibandta.org/specs/
4. OpenFabrics Enterprise Distribution (OFED). OpenFabrics Alliance. [Online]. Available: http://www.openfabrics.org/
5. S. Miura, T. Hanawa, T. Yonemoto, T. Boku, and M. Sato, "RI2N/DRV: Multi-link Ethernet for high-bandwidth and fault-tolerant network on PC clusters," in The 9th Workshop on Communication Architecture for Clusters (CAC) in IPDPS, May 2009, pp. 1-8.
6. ISO 11898: Controller Area Network (CAN), International Organization for Standardization.
7. FlexRay specifications, FlexRay Consortium, http://www.flexray.com/.
8. Advanced Switching Core Architecture Specification, ASI-SIG (PICMG), Dec. 2003.
9. J. Gudmundson, "Enabling multi-host system designs with PCI Express technology," http://www.plxtech.com/products/expresslane/techinfo, PLX Technology Inc., May 2004.
10. PCI Express External Cabling Specification, Rev. 1.0, PCI-SIG, Jan. 2007.
11. S. Kaneko et al., "A 600MHz single-chip multiprocessor with 4.8GB/s internal shared pipelined bus and 512kB internal memory," in International Solid-State Circuits Conference (ISSCC) 2003, vol. 1, Feb. 2003, pp. 254-255.
12. PCI Express Card Electromechanical (CEM) Specification, Rev. 2.0, PCI-SIG, Apr. 2007.
13. Multicore Communications API Working Group, Multicore Communications API V1.063, Multicore Association, March 2008. [Online]. Available: http://www.multicoreassociation.org/workgroup/mcapi.php
14. S. Miura, T. Hanawa, T. Boku, and M. Sato, "Inter-core communication interface on inter-/intra-chip communication for embedded parallel systems," in IPSJ SIG Technical Report, vol. 2009-ARC-184, no. 2, July 2009, pp. 1-7, (in Japanese).