A CMOS image sensor with on-chip image compression based on predictive boundary adaptation and memoryless QTD algorithm

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 19, Issue 4, 2011, Pages 538-547

  Chen, Shoushun ^a   Bermak, Amine ^b   Wang, Yan ^b  

^a NANYANG TECHNOLOGICAL UNIVERSITY   (Singapore)

^b HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

CMOS image sensor; Hilbert Scan; on chip image compression; quadrant tree decomposition (QTD)

Indexed keywords

ADAPTIVE QUANTIZATION; BOUNDARY ADAPTATION; CMOS IMAGE SENSOR; CMOS TECHNOLOGY; COMPRESSION STAGES; CONTROL CIRCUITRY; DIGITAL PIXEL SENSOR; HILBERT; IMAGE ARRAY; MEMORYLESS; NON DESTRUCTIVE; ON CHIPS; ON-CHIP IMAGES; PEAK SIGNAL-TO-NOISE RATIO; PIXEL LEVEL; PROTOTYPE CHIP; QUADRANT TREE DECOMPOSITION (QTD); SILICON AREA; SIMULATION AND MEASUREMENT; SINGLE-CHIP; STORAGE CAPABILITY; TIME DOMAIN; TREE DECOMPOSITION;

ALGORITHMS; CMOS INTEGRATED CIRCUITS; DIFFERENTIAL PULSE CODE MODULATION; DIGITAL CAMERAS; IMAGE CODING; IMAGE COMPRESSION; IMAGE SENSORS; MICROPROCESSOR CHIPS; PIXELS; RANDOM ACCESS STORAGE; SIGNAL TO NOISE RATIO;

DIGITAL IMAGE STORAGE;

EID: 79953077025     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/TVLSI.2009.2038388     Document Type: Article

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