Design of impedance measuring circuits based on phase-sensitive demodulation technique

IEEE Transactions on Instrumentation and Measurement

Volumn 60, Issue 4, 2011, Pages 1276-1282

  Chen, Dixiang ^a   Yang, Wuqiang ^b   Pan, Mengchun ^a  

^a NATIONAL UNIVERSITY OF DEFENSE TECHNOLOGY   (China)

^b UNIVERSITY OF MANCHESTER   (United Kingdom)

Author keywords

Analog multiplier; dual frequency; dual mode; electrical impedance tomography (EIT); phase sensitive demodulation (PSD)

Indexed keywords

ANALOG MULTIPLIERS; DUAL FREQUENCY; DUAL MODES; ELECTRICAL IMPEDANCE TOMOGRAPHY; PHASE-SENSITIVE DEMODULATION (PSD);

CAPACITANCE; DEMODULATION; DIAGNOSTIC RADIOGRAPHY; ELECTRIC IMPEDANCE; ELECTRIC IMPEDANCE MEASUREMENT; ELECTRIC IMPEDANCE TOMOGRAPHY; FREQUENCY MULTIPLYING CIRCUITS; OPTICAL VARIABLES MEASUREMENT; POTENTIAL FLOW;

MULTIPLYING CIRCUITS;

EID: 79952618757     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/TIM.2010.2084770     Document Type: Article

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