Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration

Microelectronic Engineering

Volumn 88, Issue 5, 2011, Pages 745-748

  Olmen, J Van ^a   Huyghebaert, C ^a   Coenen, J ^a   Aelst, J Van ^a   Sleeckx, E ^a   Ammel, A Van ^a   Armini, S ^a   Katti, G ^a,b   Vaes, J ^a   Dehaene, W ^a,b   Beyne, E ^a   Travaly, Y ^a  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

3D integration; Metallization; Through Silicon Via (TSV)

Indexed keywords

3-D INTEGRATION; D-RINGS; ELECTRICAL PERFORMANCE; INTEGRATION ISSUES; METALLIZATION; METALLIZATIONS; THROUGH SILICON VIA (TSV); THROUGH-SILICON-VIA;

INTEGRATION; METALLIZING; OSCILLATORS (ELECTRONIC);

THREE DIMENSIONAL;

EID: 79952485574     PISSN: 01679317     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.mee.2010.06.026     Document Type: Conference Paper

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