On an efficient NoC multicasting scheme in support of multiple applications running on irregular sub-networks

Microprocessors and Microsystems

Volumn 35, Issue 2, 2011, Pages 119-129

  Wang, Xiaohang ^a,b   Yang, Mei ^b   Jiang, Yingtao ^b   Liu, Peng ^a  

^a ZHEJIANG UNIVERSITY   (China)

^b University of Nevada Las Vegas   (United States)

Author keywords

Chip multiprocessor (CMP); Multicast; Network on chips (NoCs); Routing

Indexed keywords

AREA OVERHEAD; BASIC IDEA; CHIP MULTIPROCESSORS; HIGH POWER CONSUMPTION; IRREGULAR TOPOLOGY; MANY-CORE; MULTICAST ROUTING ALGORITHMS; MULTICASTS; MULTIPLE APPLICATIONS; NETWORK LATENCIES; NETWORK ON CHIP; NETWORK-ON-CHIPS (NOCS); NOC ARCHITECTURES; ON-CHIP TRAFFIC; RECURSIVE PARTITIONING; REGULAR MESHES; ROUTING; SUB-NETWORK; SUBNETWORKS; TRAFFIC ISOLATION; UNICAST; UNICASTING;

MICROPROCESSOR CHIPS; MULTIPROCESSING SYSTEMS; REGRESSION ANALYSIS; ROUTERS; ROUTING ALGORITHMS; TOPOLOGY; VLSI CIRCUITS;

MULTICASTING;

EID: 79951882970     PISSN: 01419331     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.micpro.2010.08.003     Document Type: Article

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