Thread cluster memory scheduling

IEEE Micro

Volumn 31, Issue 1, 2011, Pages 78-89

  Kim, Yoongu ^a   Papamichael, Michael ^a   Mutlu, Onur ^a   Harchol Balter, Mor ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

bandwidth sensitive threads; bank level parallelism; fairness; latency sensitive threads; Memory controller; memory intensity; memory scheduling algorithms; memory level parallelism; multicore; multiprocessors; multithreaded systems; quality of service; row buffer locality; system throughput; thread cluster

Indexed keywords

BANK-LEVEL PARALLELISM; FAIRNESS; LATENCY-SENSITIVE THREADS; MEMORY CONTROLLER; MEMORY INTENSITY; MEMORY SCHEDULING ALGORITHMS; MEMORY-LEVEL PARALLELISM; MULTI CORE; MULTI-THREADED SYSTEM; MULTIPROCESSORS; ROW-BUFFER LOCALITY; SYSTEM THROUGHPUT; THREAD CLUSTER;

BANDWIDTH; MULTIPROCESSING SYSTEMS; QUALITY CONTROL; QUALITY OF SERVICE; SCHEDULING ALGORITHMS;

CLUSTERING ALGORITHMS;

EID: 79951833650     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/MM.2011.15     Document Type: Article

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