Controlling parallelism in a multicore software router

Proceedings of the Programmable Routers for Extensible Services of Tomorrow, PRESTO 2010, Workshop Held in Conjunction with CoNEXT 2010

Volumn , Issue , 2010, Pages

  Dobrescu, Mihai ^a   Argyraki, Katerina ^a   Iannaccone, Gianluca ^b   Manesh, Maziar ^b   Ratnasamy, Sylvia ^b  

^a EPFL   (Switzerland)

^b INTEL RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CACHE MISS; IP ROUTING; LOAD-BALANCING; MANUAL CALIBRATION; MULTI CORE; OPTIMIZATION PROBLEMS; PACKET FORWARDING; PACKET PROCESSING; PROCESSING APPLICATIONS; PROCESSING CORE; PROCESSING PERFORMANCE; PROGRAMMABILITY; SERVER ARCHITECTURE; SOFTWARE ROUTERS;

COMPUTER ARCHITECTURE; PACKET NETWORKS;

ROUTERS;

EID: 79951595730     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1921151.1921154     Document Type: Conference Paper

References (9)

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