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Volumn 47, Issue 3, 2011, Pages 215-217
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ASIC implementation of fractionally spaced Rake receiver for high data rate UWB systems
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Author keywords
[No Author keywords available]
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Indexed keywords
DESIGN CONVERGENCE;
HARDWARE RESOURCES;
HIGH DATA RATE;
IMPLEMENTATION SCHEME;
MULTIPATH SELECTION;
RAKE RECEIVER;
RAKE STRUCTURES;
ROUTING CONGESTION;
TWO STAGE;
UWB SYSTEM;
ELECTRIC POWER SUPPLIES TO APPARATUS;
SHIFT REGISTERS;
SIGNAL RECEIVERS;
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EID: 79551708657
PISSN: 00135194
EISSN: None
Source Type: Journal
DOI: 10.1049/el.2010.2001 Document Type: Article |
Times cited : (6)
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References (6)
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